®

15

PCM3500

SERIAL

INTERFACE

M/S (PIN 6)

MODE

FS (PIN)

BCK (PIN 8)

0

Slave

Input

Input

1

Master

Output

Output

TABLE II. Master/Slave Mode Selection.

SYMBOL

DESCRIPTION

MIN

TYP

MAX

UNITS

BCK Period

2400

16000

ns

BCK Pulse Width HIGH

1200

8000

ns

BCK Pulse Width LOW

1200

8000

ns

Delay Time BCK Falling Edge to FS

– 40

40

ns

FS Pulse Width HIGH

ns

FS Period

DIN Set Up Time to BCK Rising Edge

60

ns

DIN Hold Time to BCK Rising Edge

60

ns

Delay Time BCK Falling Edge to DOUT

0

80

ns

Rising Time of All Signals

30

ns

Falling Time of All Signals

30

ns

FIGURE 8. Serial Interface Timing for Master Mode.

MASTER/SLAVE OPERATION

The serial interface supports both Slave and Master Mode

operation. The mode is selected by the M/S input (pin 6).

Table II shows mode and pin settings corresponding to the

M/S input selection. Figure 9 shows connections for Slave

and Master mode operation.

FIGURE 9. Slave and Master Mode Connections.

Slave Mode Operation

In Slave Mode, the FS and BCK pins are inputs to the

PCM3500. Both FS and BCK should be derived from the

system clock signal (XTI or SCKIO) to ensure proper

synchronization. Slave Mode is best suited for applications

where the DSP or controller is capable of generating the FS,

BCK, and system clocks using an on-chip serial port and/or

timing generator.

Master Mode Operation

In Master Mode operation, both FS and BCK are clock

outputs generated by the PCM3500 from the system clock

input (XTI, SCKIO, or a crystal). In Master Mode, the timing

and phase relationships between system clock, FS, and BCK

are managed internally to provide optimal synchronization.

XTI

FS

BCK

DIN

DOUT

M/S

TSC

GND

GND

Controller

System

Clock

Slave Mode

PCM3500

XTI

FS

BCK

DIN

DOUT

M/S

TSC

V

DD

GND

PCM3500

System

Clock

Controller

Master Mode

t

FSW

t

CKFS

t

BCKP

t

BCKH

t

DISU

t

DIHD

t

BCKL

t

CKDO

t

FSP

NOTES: Timing measurement reference level is (VIH/VIL)/2. Rising and falling time is measured from

10% to 90% of IN/OUT signal swing. Load capacitance of DOUT, FS, BCK signal is 50pF.

0.5V

DD

0.5V

DD

0.5V

DD

0.5V

DD

FS

(output)

BCK

(output)

DIN

(input)

DOUT

(output)