PC87591L datasheet(136/437 Pages) NSC

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Embedded Controller Modules (Continued)

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Counter Clock Source Select

The clock source unit contains two clock source selectors that allow the clock source to be selected independently for each

of the two 16-bit counters from one of the following sources:

●

No clock, in which case the counter is stopped

●

Prescaled system clock

●

External Event count based on TBn

●

Pulse Accumulate mode based on TBn

●

Slow Speed Clock i.e., 32.768 KHz

4.7.3

Timer/Counter and Action Unit

The timer/counter and action unit consists of two 16-bit counters, TnCNT1 and TnCNT2, in addition to two 16-bit reload/cap-

ture registers, TnCRA and TnCRB. The timers are down counters capable of triggering events on underflow detection (count

from 000016 to FFFF16). In addition, it contains the mode control logic which allows the timer to operate in any of four oper-

ation modes described below.

Different interrupts can be triggered on certain conditions, and the functionality of the I/O pins changes depending on the

mode of operation. Therefore the interrupt control and the I/O control are an integral part of the timer/counter unit.

Operation Modes

The MFT16 can be configured to operate in any one of four modes, as summarized in Table 18 and described in this section.

Mode 1, PWM and Counter

PWM can be used to generate precise pulses of known width and duty cycle on the TAn pin. The timer is clocked by the

instruction clock. An underflow causes the timer register to be reloaded alternately from the TnCRA and TnCRB registers

and optionally causes TAn output to toggle. Thus, the values stored in TnCRA and TnCRB registers control the high and

low time of the signal produced on TAn. In PWM mode, timer/counter 2 can be used either as a simple system timer or as

an external event counter. The counter can be loaded by software with a specific value; the counter can then generate an

interrupt after the pre-programed number of external events have been received on TBn input.

Table 18. Operation Modes

Mode

Description

Timer/Counter 1

(TnCNT1)

Reload/Capture A

(TnCRA)

Reload/Capture B

(TnCRB)

Timer/Counter 2

(TnCNT2)

PWM and system

timer or external

event counter

Counter for PWM

Auto Reload A =

PWM time 1

Auto reload = PWM

time 2

System Timer or ex-

ternal event counter

Dual input capture

and system timer

Capture A and B

time base

Capture counter 1

value on TAn event

Capture counter 1

value on TBn event

System Timer

Dual independent

timer

Time base for ﬁrst

timer

Reload register for

timer/counter 1

Reload register for

timer/counter 2

Time base for sec-

ond timer

Input capture and

timer

Time base for ﬁrst

timer

Reload register for

timer/counter 1

Capture counter 1

value on TBn event

Capture B time base

TBn

Pre-Scaler Output

Counter Clock

Figure 46. Pulse Accumulate Mode

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