Dn

FRn

Rn

Bn

HXH

H

L

HX

L

L

H

L

HHH

L

LLLL

H

X: High or low logic state

L: Low state

H: High state

L-H: Low to high transition

Glitch Filter Table

PS1

PS2

Filter Setting

LL

5 ns

L

H

10 ns

H

L

14 ns

H

H

24 ns

Application Information

The DS3884A is pin to pin and functionally compatible with

the DS3884. The DS3884A is a speed and power enhanced

version of the DS3884. There are two minor differences be-

tween the DS3884 and DS3884A.

The external resistor used in the DS3884A is different from

that used in the DS3884. REXT for the DS3884 is 6.2k while

REXT for the DS3884A is 13k. The available filter settings for

the DS3884A are 5 ns, 10 ns, 14 ns, 24 ns, while the settings

for the DS3884 are 5 ns, 7.5 ns, 15 ns, and 25 ns.

Utilization of the DS3884A simplifies the implementation of

all handshake signals which require Wired-OR glitch filtering.

Three of the six bits have an additional parallel Wired-OR fil-

tered receive output giving a total of nine receiver outputs.

DS011460-5

FIGURE 1. Driver Propagation Delay Set-Up

DS011460-6

FIGURE 2. Driver: Dn to Bn

DS011460-7

DS011460-8

Switch Position

t

PLH

t

PHL

S1

open

close

FIGURE 4. Receiver Propagation Delay Set-Up

DS011460-9

FIGURE 5. Receiver: Bn to FRn, Bn to Rn

DS011460-10

FIGURE 6. Receiver: t

DS011460-11

FIGURE 7. Receiver: PSn to Bn

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