Pin Descriptions

Pin Name

Number of

Input/

Description

Pins

Output

B1–B6

6

I/O

BTL receiver input and driver output

B1GND–B6GND

6

NA

Driver output ground reduces bounce due to high

current switching of driver outputs

(Note 12)

1

I

Driver Enable Low

D1–D6

6

I

TTL Driver Input

FR1–FR3

3

O

TTL Filtered Receiver Output

GND

3

NA

Ground reference for switching circuits.

(Note 12)

LI

1

NA

Power supply for live insertion. Boards that require live

insertion should connect LI to the live insertion pin on

the connector. (Note 13)

NC

4

NA

No Connect

PS1, PS2

2

I

Pulse Width Selection pin determines glitch filter setting

(Note 14)

R1–R6

6

O

TTL Receiver Output

REXT

1

NA

External Resistor pin. External resistor is used for

internal biasing of filter circuitry. The 13 k

Ω resistor shall

be connected between REXT and GND. The resistor

shall have a tolerance of 1% and a temperature

coefficient of 100 ppm/˚C or better.

QGND

2

NA

Ground reference for receiver input bandgap reference

and non-switching circuits (Note 12)

QV

CC

1NA

V

circuits (Note 13)

V

CC

2NA

V

Note 12: the multiplicity of grounds reduces the effective inductance of bonding wires and leads, which then reduces the noise caused by transients on the ground

path. The various ground pins can be tied together provided that the external ground has low inductance (i.e., ground plane with power pins and many signal pins

connected to the backplane ground). If the external ground floats considerably during transients, precautionary steps should be taken to prevent QGND from moving

with reference to the backplane ground. The receiver threshold should have the same ground reference as the signal coming from the backplane. A voltage offset

between their grounds will degrade the noise margin.

Note 14: See AC characteristics for filter setting.

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