LP5550

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SNVS378G – OCTOBER 2005 – REVISED APRIL 2013

R10 - R14 – Unused Registers

Address 0xA, 0xB, 0xC, 0xD, 0xE

Type R/W

Reset Default 8h’00

Bit

Field Name

Description or Comment

7:0

Unused

Write transactions to this register are ignored. Read transactions will return a “No

Response Frame.” A no response frame contains all zeros (see PWI 1.0 specification)

frame.

R15 - Manufacturer Register

Adress 0xF

Type R/W

Reset Default 8h'00

Bit

Field Name

Description or Comment

7:0

Reserved

Do not write to this register

Operation Description

DEVICE INFORMATION

The LP5550 is a PowerWise Interface (PWI) compliant power management unit (PMU) for application or

baseband processors in mobile phones or other portable equipment. It operates cooperatively with processors

using Texas Instruments' Advanced Power Controller (APC) to provide Adaptive or Dynamic Voltage Scaling

(AVS, DVS) which drastically improves processor efficiencies compared to conventional power delivery methods.

The LP5550 consists of a high efficiency switching DC/DC buck converter to supply the AVS or DVS voltage

domain, three LDOs for supplying the logic, PLL, and memory, and PWI registers and logic.

OPERATION STATE DIAGRAM

The LP5550 has four operating states: Start-up, Active, Sleep and Standby.

The Start-up state is the default state after reset. All regulators are off and PWROK output is ‘0’. The device will

power up when the external enable-input is pulled high. After the power-up sequence LP5550 enters the Active

state.

In the Active state all regulators are on and PWROK-output is ‘1’. Immediately after Start-up the output voltages

are at their default levels. LP5550 can be turned off by supplying the Shutdown command over PWI, or by setting

ENABLE and/or RESETN to '0'. The LP5550 can be switched to the Sleep state by issuing the Sleep command.

In the Sleep state the core voltage regulator is off, but the PWROK output is still ‘1’. The memory voltage

regulator (VO3) provides the programmed memory retention voltage. LDO1 and LDO2 are on. The LP5550 can

be activated from the Sleep state by giving the Wake-up command. This resumes the last programmed Active

state configuration. The device can also be switched off by giving the Shutdown command, or by setting

ENABLE and/or RESETN to ‘0’

In the Shutdown-state all output voltages are ‘0’, and PWROK-signal is ‘0’ as well. The LP5550 can exit the

Shutdown-state if either ENABLE or RESETN is ‘0’. In either case the device moves to the Start-up state. See

the ENABLE

Figure 27 shows the LP5550 state diagram. The figure assumes that supply voltage to the regulator IC is in the

valid range.

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