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LP5550 датащи(PDF) 5 Page - Texas Instruments |
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LP5550 датащи(HTML) 5 Page - Texas Instruments |
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5 / 28 page ![]() LP5550 www.ti.com SNVS378G – OCTOBER 2005 – REVISED APRIL 2013 LDO1 (PLL/Fixed Voltage) Characteristics (continued) Unless otherwise noted, VBAT1,2,SW, RESETN, ENABLE = 3.6V. Typical values and limits appearing in normal type apply for TJ = 25°C. Limits appearing in boldface type apply over the entire junction temperature range for operation, -40 to +125°C (1)(2)(3) Symbol Parameter Conditions Min Typ Max Unit ΔVOUT 3.0V ≤ VBAT1,2,SW ≤ 5.5V, Line Regulation -0.125 0.125 %/V IOUT = 50mA Load Regulation VIN = 3.6V, 1mA ≤ IOUT ≤ 100mA -0.0085 0.0085 %/mA Line Transient Regulation 3.6V ≤ VIN ≤ 3.9V, TRISE,FALL = 10 µs 27 mV VIN = 3.6V, 10mA ≤ IOUT ≤ 90 mA, Load Transient Regulation 86 mV TRISE,FALL = 100 ns eN Output Noise Voltage 10Hz ≤ f ≤ 100kHz, COUT = 2.2µF 0.103 mVRMS PSRR f = 1kHz, COUT = 2.2µF 56 dB Power Supply Ripple Rejection Ratio f = 10kHz, COUT = 2.2µF 36 dB COUT 0µA ≤ IOUT ≤ 100mA 1 2.2 20 µF Output Capacitance Output Capacitor ESR 5 500 m Ω tSTART-UP Start-Up Time from Shut-down COUT = 1µF, IOUT = 100mA 54 µs LDO2 (I/O Voltage) Characteristics Unless otherwise noted, VBAT1,2,SW , RESETN, ENABLE = 3.6V. Typical values and limits appearing in normal type apply for TJ = 25°C. Limits appearing in boldface type apply over the entire junction temperature range for operation, -40 to +125°C (1) (2) (3) Symbol Parameter Conditions Min Typ Max Unit VOUT Accuracy 1mA ≤ IOUT ≤ 250mA, VOUT = 2.5V, Output Voltage Accuracy -3% 2.5 3% V VOUT +0.4V ≤ VBAT1,2,SW ≤ 5.5V VOUT Range Programmable Output Voltage 0µA ≤ IOUT ≤ 250mA, 1.5-2.3V =100mV 1.5 3.3 3.3 V Range step, 2.5V, 2.8V, 3.0V and 3.3V IOUT Recommended Output Current VOUT +0.4V ≤ VBAT1,2,SW ≤ 5.5V 250 mA Output Current Limit VOUT = 0V 740 Dropout Voltage(4) IOUT = 125mA 70 260 mV IQ Quiescent Current IOUT = 0mA (5) 55 60 µA ΔVOUT VOUT +0.4V ≤ VBAT1,2,SW ≤ 5.5V, Line Regulation -0.125 0.125 %/V IOUT = 125mA Load Regulation VIN = 3.6V, 1mA ≤ IOUT ≤ 250mA -0.011 0.011 %/mA Line Transient Regulation 3.6V ≤ VIN ≤ 3.9V, TRISE,FALL = 10 us 24 mV VIN = 3.6V, 25mA ≤ IOUT ≤ 225 mA, Load Transient Regulation 246 mV TRISE,FALL = 100 ns eN Output Noise Voltage 10Hz ≤ f ≤ 100kHz, COUT = 4.7µF 0.120 mVRMS PSRR f = 1kHz, COUT = 4.7µF 46 dB Power Supply Ripple Rejection Ratio f = 10kHz, COUT = 4.7µF 34 COUT Output Capacitance 2 4.7 20 µF 0µA ≤ IOUT ≤ 250mA Output Capacitor ESR 5 500 m Ω tSTART-UP Start-Up Time from Shut-down COUT = 4.7µF, IOUT = 250mA 144 µs (1) All voltages are with respect to the potential at the GND pin. (2) Min and Max limits are ensured by design, test, or statistical analysis. Typical (Typ) numbers are not specified, but do represent the most likely norm. Unless otherwise specified, conditions for Typ specifications are: VIN = 3.6V and TA = 25°C control. (3) Capacitors: Low-ESR Surface-Mount Ceramic Capacitors are (MLCCs) used in setting electrical characteristics (4) Dropout voltage is the input-to-output voltage difference at which the output voltage is 100mV below its nominal value. This specification does not apply in cases it implies operation with an input voltage below the 3.0V minimum appearing under Operating Ratings. For example, this specification does not apply for devices having 1.5V outputs because the specification would imply operation with an input voltage at or about 1.5V (5) Quiescent current for LDO1, LDO2, and LDO3 do not include shared functional blocks such as the bandgap reference. Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: LP5550 |
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