SDA

SCL

1

8

2

3

7

6

5

8

10

4

9

1

7

LP3936

SNVS259D – NOVEMBER 2003 – REVISED MAY 2013

www.ti.com

Limits

Symbol

Parameter

Units

Min

Max

1

Hold Time (repeated) START Condition

0.6

µs

2

Clock Low Time

1.3

µs

3

Clock High Time

600

ns

4

Setup Time for a Repeated START Condition

600

ns

5

Data Hold Time (output direction, delay generated by LP3936)

300

900

ns

5

Data Hold Time (input direction)

0

900

ns

6

Data Setup Time

100

ns

7

Rise Time of SDA and SCL

300

ns

8

Fall Time of SDA and SCL

300

ns

9

Set-Up Time for STOP Condition

600

ns

10

Bus Free Time between a STOP and a START Condition

1.3

µs

Capacitive Load for Each Bus Line

10

200

pF

(1)

Specified by design. Not production tested.

A/D Converter for Ambient Light Measurement

Electrical Characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Units

Input Voltage

AD Output: 00h

1.23

V

AD Output: FFh

2.46

V

DNL

Differential Non-Linearity

–1.5

±1

+1.5

LSB

GE

Gain Error

−5

+5

LSB

PSS

Power Supply Sensitivity

3.1V

±1/2

LSB

f(conv)

Conversion Rate

Without Averaging

217

Hz

With Averaging

3.4

Hz

(64 samples)

Startup Time

100

ms

Input Current

1.23 < AIN < 2.6V

±0.1

µA

Maximum Output Current

AREF Output Current Sink

200

µA

AREF Output Resistance

110

Ω

ADC output AIN[7:0] can be read from address 0CH after startup time. Overflow bit can be read from bit D7 in

address 0BH. The overflow bit indicates that input voltage exceeds the input voltage range of the ADC. The ADC

output value in this case is FFH. When averaging is on, the overflow is high, if any of the 64 conversion results in

the averaging period overflows. Thus the averaged result may be considerably below maximum and the overflow

can still be high, if the input signal is noisy.

12

Submit Documentation Feedback

Copyright © 2003–2013, Texas Instruments Incorporated

Product Folder Links: LP3936