SDA

SCL

S

P

P

STO

condition

SCL

SDA

data

change

allowed

data

valid

data

change

allowed

data

valid

data

change

allowed

LP3936

SNVS259D – NOVEMBER 2003 – REVISED MAY 2013

www.ti.com

MicroWire Timing Parameters

(1)

Limit

Symbol

Parameter

Units

Min

Max

1

Cycle Time

120

ns

2

Enable Lead Time

60

ns

3

Enable Lag Time

60

ns

4

Clock Low Time

60

ns

5

Clock High Time

60

ns

6

Data Setup Time

0

ns

7

Data Hold Time

10

ns

8

Data Access Time

35

ns

9

Disable Time

30

ns

10

Output Data Valid

55

ns

11

Output Data Hold Time

15

ns

12

CS Inactive Time

10

ns

(1)

Specified by design. Not production tested.

I

The data on SDA line must be stable during the HIGH period of the clock signal (SCL). In other words, state of

the data line can only be changed when CLK is LOW.

signal transitioning from HIGH to LOW while SCL line is HIGH. STOP condition is defined as the SDA

conditions are equivalent, function-wise.

10

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