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SC28L91 датащи(PDF) 11 Page - NXP Semiconductors |
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SC28L91 датащи(HTML) 11 Page - NXP Semiconductors |
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11 / 42 page ![]() Philips Semiconductors Product specification SC28L91 3.3V–5.0V Universal Asynchronous Receiver/Transmitter (UART) 2000 Sep 22 11 DC ELECTRICAL CHARACTERISTICS1, 2, 3 VCC = 3.3V ± 10%, Tamb = –40°C to +85°C, unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit VIL Input low voltage 0.65 0.2*VCC V VIH Input high voltage 0.8*VCC 1.7 V VOL Output low voltage IOL = 2.4mA 0.2 0.4 V VOH Output high voltage (except OD outputs)4 IOH = –400µA VCC–0.5 VCC–0.2 V IIX1PD X1/CLK input current - power down VIN = 0 to VCC –0.5 0.05 +0.5 µA IILX1 X1/CLK input low current - operating VIN = 0 –80 0 µA IIHX1 X1/CLK input high current - operating VIN = VCC 0 80 µA Input leakage current: II All except input port pins VIN = 0 to VCC –0.5 0.05 +0.5 µA Input port pins5 VIN = 0 to VCC –8 0.5 +0.5 µA IOZH Output off current high, 3-State data bus VIN = VCC 0.5 µA IOZL Output off current low, 3-State data bus VIN = 0V –0.5 µA IODL Open-drain output low current in off-state VIN = 0 –0.5 µA IODH Open-drain output high current in off-state VIN = VCC 0.5 µA Power supply current6 ICC Operating mode CMOS input levels 5 mA Power down mode CMOS input levels ≤1 5.0 mA NOTES: 1. Parameters are valid over specified temperature and voltage range. 2. All voltage measurements are referenced to ground (GND). For testing, all inputs swing between 0.4 V and 3.0 V with a transition time of 5ns maximum. For X1/CLK, this swing is between 0.4 V and 0.8*VCC. All time measurements are referenced at input voltages of 0.8 V and 2.0V and output voltages of 0.8 V and 2.0 V, as appropriate. 3. Typical values are at +25 °C, typical supply voltages, and typical processing parameters. 4. Test conditions for outputs: CL = 125 pF, except open drain outputs. Test conditions for open drain outputs: CL = 125 pF, constant current source = 2.6 mA. 5. Input port pins have active pull-up transistors that will source a typical 2 µA from VCC when the input pins are at VSS. Input port pins at VCC source 0.0 µA. 6. All outputs are disconnected. Inputs are switching between CMOS levels of VCC –0.2 V and VSS+0.2 V. |
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