DP8420V datasheet(23/60 Pages) NSC

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50 Refresh Options (Continued)

513 Refresh RequestAcknowledge

The DP8420V21V22V DP84T22 can be programmed to

output internal refresh requests When the user programs

ECAS0 negated (1) andor address pipelining mode is se-

lected the WE output functions as RFRQ RFRQ (WE) will

be asserted by one of two events

First when the external circuitry pulses low the input RFSH

which will request an external refresh

Second when the internal refresh clock has expired which

signals that another refresh is needed

An example of the first case where an external refresh is

requested while RFRQ is negated (1) is shown in

Figure

15a Notice that RFRQ will be asserted from a positive edge

of clock

On the second case when the RFRQ is asserted from the

expiration of the internal refresh clock the user has two

options

First if DISRFSH is negated an automatic internal refresh

will take place See

Figure 15b

Second with DISRFSH asserted RFRQ will stay asserted

until RFSH is pulsed low This option will cause an external-

ly requestedburst refresh to take place See

Figure 15c

RFRQ will go high and then assert (toggle) if additional peri-

ods of the internal refresh clock have expired and neither an

externally controlled refresh nor an automatically controlled

internal refresh have taken place see

Figure 15d If a time

critical event or long accesses like pagestatic column

mode can not be interrupted RFRQ pulsing high can be

used to increment a counter This counter can be used to

perform a burst refresh of the number of refreshes missed

(through the RFSH input)

TLF11109 – 24

FIGURE 15a Externally Controlled Single and Burst Refresh with Refresh Request

(RFRQ) Output (2 Periods of RAS Low during Refresh Programmed)

TLF11109 – 25

FIGURE 15b Automatic Internal Refresh with Refresh Request (3T of RAS Low during Refresh Programmed)

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