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DP83256 датащи(PDF) 139 Page - Texas Instruments

номер детали DP83256
подробное описание детали  PLAYER(TM) Device (FDDI Physical Layer Controller)
PDF  146 Pages
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производитель  TI1 [Texas Instruments]
домашняя страница  http://www.ti.com
Logo TI1 - Texas Instruments

DP83256 датащи(HTML) 139 Page - Texas Instruments

Back Button DP83256 Datasheet HTML 135Page - Texas Instruments DP83256 Datasheet HTML 136Page - Texas Instruments DP83256 Datasheet HTML 137Page - Texas Instruments DP83256 Datasheet HTML 138Page - Texas Instruments DP83256 Datasheet HTML 139Page - Texas Instruments DP83256 Datasheet HTML 140Page - Texas Instruments DP83256 Datasheet HTML 141Page - Texas Instruments DP83256 Datasheet HTML 142Page - Texas Instruments DP83256 Datasheet HTML 143Page - Texas Instruments Next Button
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80 Connection Diagrams (Continued)
TABLE 8-3 DP83257 160-Pin PQFP Pinout Summary
(Continued)
Pin No
Signal Name
Symbol
IO
Pin Type
39
No Connect
NC
40
No Connect
NC
41
No Connect
NC
42
No Connect
NC
43
No Connect
NC
44
No Connect
NC
45
Crystal Output
XTAL
OUT
O
46
Crystal Input
XTAL
IN
I
47
ESD Power
VCC ESD
a
5V
48
ESD Ground
GND
ESD
a
0V
49
Loop Filter
LPFLTR
O
50
Transmit Clockb
TXCb
O
ECL
51
Transmit Clocka
TXCa
O
ECL
52
ECL Power
VCC ECL
a
5V
53
PMD Request Datab
PMRDb
O
ECL
54
PMD Request Data a
PMRDa
O
ECL
55
Receive Clock Outb
RXC
OUTb
O
ECL
56
Receive Clock Outa
RXC
OUTa
O
ECL
57
ECL Power
VCC ECL
a
5V
58
ECL Ground
GND
ECL
a
0V
59
Signal Detectb
SDb
I
ECL
60
Signal Detecta
SDa
I
ECL
61
PMD Indicate Datab
PMIDb
I
ECL
62
PMD Indicate Dataa
PMIDa
I
ECL
63
Sense Pin 0
SP0
I
TTL
64
Enable Pin 0
EP0
O
TTL
65
Sense Pin 1
SP1
I
TTL
66
Enable Pin 1
EP1
O
TTL
67
Sense Pin 2
SP2
I
TTL
68
Enable Pin 2
EP2
O
TTL
69
Cascade Start
CS
I
TTL
70
Cascade Ready
CR
O
Open Drain
71
ECL Power
VCC ECL
a
5V
72
ECL Ground
GND
ECL
a
0V
73
PMD Transmitter Enable
TXE
O
TTL
74
PMD Transmitter Enable Level
TEL
I
TTL
75
Receive Clock Inb
RXC
INb
I
ECL
76
Receive Clock Ina
RXC
INa
I
ECL
138



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