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DP83256 датащи(PDF) 118 Page - Texas Instruments

номер детали DP83256
подробное описание детали  PLAYER(TM) Device (FDDI Physical Layer Controller)
PDF  146 Pages
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производитель  TI1 [Texas Instruments]
домашняя страница  http://www.ti.com
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DP83256 датащи(HTML) 118 Page - Texas Instruments

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70 Electrical Characteristics (Continued)
AC Characteristics for the Clock Interface Signals (Timing and Relationships)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
TPhase1
LBC1 – LBC2 Timing
PH
SEL e LOW
50
8
110
ns
TPhase2
LBC1 – LBC3 Timing
PH
SEL e LOW
130
16
190
ns
TPhase3
LBC1 – LBC4 Timing
PH
SEL e LOW
210
24
270
ns
TPhase4
LBC1 – LBC5 Timing
PH
SEL e LOW
290
32
350
ns
TPhase1
LBC1 – LBC2 Timing
PH
SEL e HIGH
450
48
510
ns
TPhase2
LBC1 – LBC3 Timing
PH
SEL e HIGH
130
16
190
ns
TPhase3
LBC1 – LBC4 Timing
PH
SEL e HIGH
610
64
670
ns
TPhase4
LBC1 – LBC5 Timing
PH
SEL e HIGH
290
32
350
ns
TPhase5
LBC5 Rising-
PH
SEL e LOW or
50
8
120
ns
LBC1 Falling Timing
PH
SEL e HIGH
T23
LSC Falling to LBC1
(Note 1)
b
3
a
6ns
T24
REF
IN to FBK
IN
In Lock
b
2
a
2ns
Note 1
LSC loading must always be less than or equal to LBC1 loading
TLF11708 – 33
FIGURE 7-6 Clock Signal Relationships
117



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