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DP83847 датащи(PDF) 43 Page - National Semiconductor (TI)

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номер детали DP83847
подробное описание детали  DsPHYTER II ??Single 10/100 Ethernet Transceiver
PDF  60 Pages
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производитель  NSC [National Semiconductor (TI)]
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Table 23. CD Test Register (CDCTRL), Address 0x1B
Bit
Bit Name
Default
Description
15
CD_ENABLE
1, RW
CD Enable:
1 = CD Enabled - power-down mode, outputs high impedance.
0 = CD Disabled.
14
DCDCOMP
0, RW
Duty Cycle Distortion Compensation:
1 = Increases the amount of DCD compensation.
13
FIL_TTL
0, RW
Waveshaper Current Source Test:
To check ability of waveshaper current sources to switch on/off.
1 = Test mode; waveshaping is done, but the output is a square
wave. All sources are either on or off.
0 = Normal mode; sinusoidal.
12
RESERVED
none, RW
Reserved: This bit should be written with a 0 if write access is re-
quired on this register.
11
RISETIME
Strap, RW
CD Rise Time Control:
10
RESERVED
none, RW
Reserved: This bit should be written with a 0 if write access is re-
quired on this register.
9
FALLTIME
Strap, RW
CD Fall Time Control:
8
CDTESTEN
0, RW
CD Test Mode Enable:
1 = Enable CD test mode - differs based on speed of operation
(10/100Mb).
0 = Normal operation.
7:5
RESERVED[2:0]
000, RW
RESERVED:
Must be zero.
4
CDPATTEN_10
0, RW
CD Pattern Enable for 10meg:
1 = Enabled.
0 = Disabled.
3
CDPATTEN_100
0, RW
CD Pattern Enable for 100meg:
1 = Enabled.
0 = Disabled.
2
10MEG_PATT_GAP
0, RW
Defines gap between data or NLP test sequences:
1 = 15
µs.
0 = 10
µs.
1:0
CDPATTSEL[1:0]
00, RW
CD Pattern Select[1:0]:
If CDPATTEN_100 = 1:
00 = All 0’s (True quiet)
01 = All 1’s
10 = 2 1’s, 2 0’s repeating pattern
11 = 14 1’s, 6 0’s repeating pattern
If CDPATTEN_10 = 1:
00 = Data, EOP0 sequence
01 = Data, EOP1 sequence
10 = NLPs
11 = Constant Manchester 1s (10mhz sine wave) for harmonic dis-
tortion testing.



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