DP83266 datasheet(92/152 Pages) NSC

92 / 152 page

70 Control Information (Continued)

Pointer RAM Control and Address Register (PCAR)

The Pointer RAM Control and Address Register (PCAR) is used to program the parameters for the PTOP (Pointer RAM

Operation) service function in which data is written to or read from a Pointer RAM Register

This register is not altered upon reset

Access Rules

Address

Read

Write

102h

Always

BP1

BP0

PTRW

Bit

Symbol

Description

D4–D0

A4–A0

Pointer RAM Address

These five bits contain the Pointer RAM Register address for a subsequent

PTOP service function

PTRW

PTOP ReadWrite

This bit determines whether a PTOP service function will be a read from the Pointer

RAM Register to the mailbox in memory (PTRW e 1) or a write to the Pointer RAM Register from the

mailbox (PTRW e 0)

D7 – D6

BP1 – BP0

Byte Pointer

These two bits are used to program an internal byte pointer for accesses to the 28-bit

Mailbox Address Register They are normally set to Zero to initialize the byte pointer for four successive

writes (most-significant byte first) and are automatically incremented after each write Because this

the Mailbox Address Register

Mailbox Address Register (MBAR)

The Mailbox Address Register (MBAR) is used to program the word-aligned 28-bit memory address of the mailbox used in the

data transfer of the PTOP (Pointer RAM Operation) service function

The address of the register is used as a window into four internal byte registers The four byte registers are loaded by successive

writes to the address after first setting the BP1 – 0 bits in the Pointer RAM Control and Address Register to Zero The bytes must

be loaded most-significant byte first The MACSI device increments the byte pointer internally after each write or read Mailbox

Address bits 0 and 1 forced internally to Zero

The four internal byte registers are initialized to a 28-bit System Interface Revision code upon reset The System Interface

Revision code remains until it is overwritten by the host The BP1 – 0 bits in the PCAR must be initialized before accessing the

MBAR to fetch the System Interface Revision code

Access Rules

Address

Read

Write

103h

Always

Mailbox Address 2724

Mailbox Address 2316

Mailbox Address 158

Mailbox Address 70

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