DP83266 datasheet(28/152 Pages) NSC

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60 Functional Description (Service Engine) (Continued)

With High-priorityLow-priority sorting high-priority asyn-

chronous frames are sorted onto Indicate Channel 1 and

low-priority asynchronous frames are sorted onto Indicate

Channel 2 The most-significant bit of the three-bit priority

field within the FC field determines the priority This Mode is

intended for end stations using two priority levels of asyn-

chronous transmission Synchronous frames are sorted to

Indicate Channel 1 in this mode

With ExternalInternal sorting frames matching the internal

address (Individual or Group addresses in the MACSI de-

vice) are sorted onto Indicate Channel 1 and frames match-

ing an external address (when the ECOPY input is asserted)

are sorted onto Indicate Channel 2 Note that under some

conditions it is possible to sort internal address match and

SMTMAC frames to Indicate Channel 2 Please see Sec-

tion 63 for full details on the External Matching Interface

This sort mode is intended for bridges or ring monitors

which would use the ECIPECOPYEM pins with external

address matching circuitry However designers should be

aware of the functioning of the ECIP pin even if external

matching will not be used If ECIP is left in an improper state

(eg floating or tied high) it will affect the operation of the

MACSI device even when ExternalInternal sorting is not

enabled

With the HeaderInfo Sort Mode Indicate Channels 1 and 2

receive all non-MACSMT frames that are to be copied but

between them split the frame header (whose length is user-

defined) and the remaining portions of the frame (Info) Indi-

cate Channel 1 copies the initial bytes up until the host-de-

fined header length is reached The remainder of the

frame’s bytes are copied onto Indicate Channel 2 Only one

IDUD stream is produced (on Indicate Channel 1) but both

Pool Space Pointer (PSP) Queues are used to determine

where the IDUs will be written When a multi-part IDUD is

produced the Indicate Status field is used to determine

which parts point to the header and which point to the Info

This Mode is intended for high-performance protocol pro-

cessing applications

The Indicate Machine filters identical MAC and SMT frames

when the SKIP bit in the Indicate Mode Register is set and

the Indicate Configuration Register’s Copy Control field (2

bits) for Indicate Channel 0 is set to 01 or 10

Received frames are copied to memory based on the

AFLAG MFLAG ECIP ECOPY and EM input signals from

external address matching logic control signals from the

Ring Engine as well as the Indicate Channel’s Copy Control

field Received frames are written as a series of Input Data

Units to the current Indicate memory page defined by the

host via a PSP Each frame is aligned to the start of a cur-

rently-defined burst-size memory block (16 or 32 bytes as

programmed in the Mode Register’s SMLB bit) The first

word written contains four copies of the FC byte The IDUD

pointer points to the last FC byte so that host software sees

only a single FC byte as expected The extra FC bytes have

the advantage of causing the INFO field to be aligned to a

32-bit word boundary The format differs according to the

setting of the Mode Register’s BIGEND (Big Endian) bit as

shown in

Figure 6-1

Byte 0

Byte 3

Bit 31

Bit 0

Big Endian Indicate Data Unit Format

DA0

DA1

SA0

SA1

Byte 3

Byte 0

Bit 0

Bit 31

Little Endian Indicate Data Unit Format

SA1

SA0

DA1

DA0

FIGURE 6-1 Indicate Data Unit Formats

(Short Address)

For each Input Data Unit the Indicate Machine creates an

Input Data Unit Descriptor (IDUD) which contains status in-

formation about the IDU its size (byte count) and its loca-

tion in memory For IDUs that fit within the current Indicate

memory page an IDUDOnly Descriptor is created For IDUs

that span more than one memory page a multi-part IDUD is

created For example when a frame crosses a page bound-

ary the MACSI device writes an IDUDFirst If another page

is crossed an IDUDMiddle will be written At the frame end

an IDUDLast is written IDUDs are written to consecutive

locations in the Indicate Status Queue for the particular Indi-

cate Channel up to the host-defined queue limit

The MACSI device has two modes for storing IDUs into Pool

Space Pages In the first mode the MACSI device will as-

semble as many frames into a 4 kByte page as will fit Thus

a single page of Pool Space memory may contain multiple

frames and have many IDUDs pointing to it In the second

mode the MACSI device forces a page break after the end

of each frame This means that a single page of Pool Space

memory will have at most a single IDUD pointing to it This

mode greatly simplifies space reclamation in those systems

which do not process incoming frames in order of receipt

and supports systems in which the cache line size is greater

than 32 bytes

The Indicate Machine copies IDUs and IDUDs to memory as

long as there are no exceptions or errors and the Channel

has data and status space When a lack of either data or

status space is detected on a particular Channel the Indi-

cate Machine stops copying new frames for that Channel

(only) It will set the No Status Space attention bit in the No

Space Attention Register when it runs out of Status Space

It will set the Low Data Space bit in the No Space Attention

Indicate Channel PSP Queue The host allocates more data

space by adding PSPs to the tail of the PSP Queue and then

updating the PSP Queue Limit Register which causes the

MACSI device to clear the Low Data Space attention bit and

resume copying (on the same Channel) The user should

never

clear the Low Data Space attention bits directly The

host allocates more status space by updating the IDUD

Queue Limit Register and then explicitly clearing the Chan-

nel’s No Status Space bit after which the Indicate Machine

resumes copying Note that the No Status Space Attention

bit must be cleared after the appropriate limit register is

updated

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