COP884CF datasheet(15/44 Pages) NSC

15 / 44 page

Reset

The RESET input when pulled low initializes the microcon-

troller. Initialization will occur whenever the RESET input is

pulled low. Upon initialization, the data and configuration

registers for Ports L, G, and C are cleared, resulting in these

Ports being initialized to the TRI-STATE mode. Pin G1 of the

G Port is an exception (as noted below) since pin G1 is dedi-

cated as the WatchDog and/or Clock Monitor error output

pin. Port D is initialized high with RESET. The PC, PSW, CN-

TRL, ICNTRL, and T2CNTRL control registers are cleared.

The Multi-Input Wakeup registers WKEN, WKEDG, and

WKPNDare cleared. The A/D control register ENAD is

cleared, resulting in the ADC being powered down initially.

The Stack Pointer, SP, is initialized to 06F Hex.

The device comes out of reset with both the WatchDog logic

and the Clock Monitor detector armed, and with both the

WatchDog service window bits set and the Clock Monitor bit

set. The WatchDog and Clock Monitor detector circuits are

inhibited during reset. The WatchDog service window bits

are initialized to the maximum WatchDog service window of

64k t

c clock cycles. The Clock Monitor bit is initialized high,

and will cause a Clock Monitor error following reset if the

clock has not reached the minimum specified frequency at

the termination of reset. A Clock Monitor error will cause an

active low error output on pin G1. This error output will con-

tinue until 16–32 t

c clock cycles following the clock fre-

quency reaching the minimum specified value, at which time

the G1 output will enter the TRI-STATE mode.

The external RC network shown in

Figure 5 should be used

to ensure that the RESET pin is held low until the power sup-

ply to the chip stabilizes.

Oscillator Circuits

The chip can be driven by a clock input on the CKI input pin

which can be between DC and 10 MHz. The CKO output

clock is on pin G7 (crystal configuration). The CKI input fre-

quency is divided down by 10 to produce the instruction

cycle clock (1/t

c).

Figure 6 shows the Crystal and R/C diagrams.

CRYSTAL OSCILLATOR

CKI and CKO can be connected to make a closed loop crys-

tal (or resonator) controlled oscillator.

Table 1 shows the component values required for various

standard crystal values.

R/C OSCILLATOR

By selecting CKI as a single pin oscillator input, a single pin

R/C oscillator circuit can be connected to it. CKO is available

as a general purpose input, and/or HALT restart pin.

Table 2 shows the variation in the oscillator frequencies as

functions of the component (R and C) values.

TABLE 1. Crystal Oscillator Configuration, T

A = 25˚C

CKI

Freq

Conditions

Ω)(MΩ)

(pF)

(MHz)

30–36

CC = 5V

30–36

CC = 5V

200

100–150

0.455

CC = 5V

TABLE 2. R/C Oscillator Configuration, T

A = 25˚C

CKI Freq

Instr.

Cycle

Conditions

Ω)

(pF)

(MHz)

(µs)

3.3

2.2 to 2.7

3.7 to 4.6

CC = 5V

5.6

100

1.1 to 1.3

7.4 to 9.0

CC = 5V

6.8

100

0.9 to 1.1

8.8 to 10.8

CC = 5V

Note: 3k

≤ R ≤ 200k

50 pF

≤ C ≤ 200 pF

DS009425-7

RC > 5 x Power Supply Rise Time

FIGURE 5. Recommended Reset Circuit

DS009425-8

DS009425-9

FIGURE 6. Crystal and R/C Oscillator Diagrams

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