CS8900A datasheet(40/128 Pages) CIRRUS

40 / 128 page

DS271PP3

CS8900A

Crystal LAN™ ISA Ethernet Controller

CIRRUS LOGIC PRODUCT DATA SHEET

etPage base + 0A00h) are directly accessible. See

Section 4.7 on page 73.

4.2 PacketPage Memory Map

Table 12 shows the CS8900A PacketPage memory

address map: s

PacketPage

Address

# of

Bytes

Type

Description

Cross Reference

Bus Interface Registers

0000h

Read-only Product Identification Code

Section 4.3 on page 42

0004h

Reserved

Note 2

0020h

Read/Write I/O Base Address

Section 4.3 on page 42,

Section 4.7 on page 73

0022h

Read/Write Interrupt Number (0,1,2,or 3)

Section 3.2 on page 18,

Section 4.3 on page 42

0024h

Read/Write DMA Channel Number (0, 1, or 2)

Section 3.2 on page 18,

Section 4.3 on page 42

0026h

Read-only DMA Start of Frame

Section 4.3 on page 42,

Section 5.4 on page 90

0028h

Read-only DMA Frame Count (12 Bits)

Sections Section 4.3 on page 42,

”Receive DMA”

002Ah

Read-only RxDMA Byte Count

Section 4.3 on page 42,

Section 5.4 on page 90

002Ch

Read/Write Memory Base Address Register

(20 Bit)

Section 4.3 on page 42,

Section 4.9 on page 74

0030h

Read/Write Boot PROM Base Address

Section 3.6 on page 25,

Section 4.3 on page 42

0034h

Read/Write Boot PROM Address Mask

Section 3.6 on page 25,

Section 4.3 on page 42

0038h

Reserved

Note 2

0040h

Read/Write EEPROM Command

Section 3.5 on page 24,

Section 4.3 on page 42

0042h

Read/Write EEPROM Data

Section 3.5 on page 24,

Section 4.3 on page 42

0044h

Reserved

Note 2

0050h

Read only Received Frame Byte Counter

Section 4.3 on page 42,

Section 5.2.9 on page 87

0052h

174

Reserved

Note 2

Status and Control Registers

0100h

Read/Write Configuration & Control Registers

(2 bytes per regiseter)

Section 4.4 on page 47

0120h

Read-only Status & Event Registers

(2 bytes per register)

Section 4.4 on page 47

0140h

Reserved

Note 2

Initiate Transmit Registers

Notes: 1. All registers are accessed as words only.

2. Read operation from the reserved location provides undefined data. Writing to a reserved location or

undefined bits may result in unpredictable operation of the CS8900A.

Table 12. PacketPage Memory Address Map

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