CS8900A datasheet(83/128 Pages) CIRRUS

83 / 128 page

DS271PP3

CS8900A

Crystal LAN™ ISA Ethernet Controller

CIRRUS LOGIC PRODUCT DATA SHEET

5.2.3 Receive Frame Pre-Processing

The CS8900A pre-processes all receive frames us-

ing a four step process:

1) Destination Address filtering;

2) Early Interrupt Generation;

3) Acceptance filtering; and,

4) Normal Interrupt Generation.

Figure 21 provides a diagram of frame pre-process-

ing.

5.2.3.1 Destination Address Filtering

All incoming frames are passed through the Desti-

nation Address filter (DA filter). If the frame’s DA

passes the DA filter, the frame is passed on for fur-

ther pre-processing. If it fails the DA filter, the

frame is discarded. See Section 5.3 on page 87 for

a more detailed description of DA filtering.

Bit

Bit Name

Operation

StreamE

When set, Stream Transfer

enabled.

RxDMAonly

When set, DMA slave opera-

tion used for all receive

frames.

AutoRX DMAE When set, Auto-Switch DMA

enabled.

BufferCRC

When set, the received CRC

is buffered.

Bit

Bit Name

Operation

DMABurst

When set, DMA operations

hold the bus for up to approx-

imately 28 µs. When clear,

DMA operations are continu-

ous.

RxDMAsize

When set, DMA buffer size is

64 Kbytes. When clear, DMA

buffer size is 16 Kbytes.

Table 22. Receive Frame Pre-Processing

Pass

DA Filter?

Discard Frame

Destination

Address Filter

Check:

- PromiscuousA?

- IAHashA?

- MulticastA?

- IndividualA?

- BroadcastA?

Receive Frame

Yes

Generate Interrupts

Check:

- RxOKiE?

- ExtradataiE?

- CRCerroriE?

- RuntiE?

- RxDMAiE?

Pre-Processing

Complete

Generate Early

Interrupts if Enabled

(see next figure)

Acceptance Filter

Check:

- RxOKA?

- ExtradataA?

- RuntA?

- CRCerrorA?

Status of receive

frame reported in

RxEvent register,

frame discarded.

Status of receive

frame reported in

RxEvent register,

frame accepted

into on-chip RAM

Pass

Accept.

Filter?

Figure 21. Receive Frame Pre-Processing

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