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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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Z80 датащи(PDF) 51 Page - Zilog, Inc. |
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Z80 датащи(HTML) 51 Page - Zilog, Inc. |
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51 / 330 page  < %27 2GTKRJGTCNU 7UGT /CPWCN UM008101-0601 Direct Memory Access Direct Memory Access DMA OVERVIEW Direct Memory Access (DMA) and DMA Controllers are dedicated to controlling high-speed block transfers of data independently of the CPU. DMA data transfers are usually between memory and I/O, or vice versa. A DMA controller (DMAC) also performs some transfers that have tradi- tionally been done by the CPU. For example, the Z80 DMA can perform memory-to-memory, memory-to-I/O, and I/O-to-memory transfers, as well as search for particular patterns of bits in a byte either simulta- neously with or independently of transfers. The advantages of DMA transfers are: • Transfers bypass the CPU • Transfers are fast CPU Data Transfers In systems without DMA, data transfers must pass through the CPU and be implemented in software. Data transfers through the CPU include executing an instruction sequence for input and output, and tracking each byte of data in the block to be transferred. Figure 15 illustrates the minimum sequence of instructions that must be fetched from memory and executed by conventional CPUs to transfer a block of data one byte at a time. Most CPUs require many more instructions. CPU transfers are relatively slow and tie up the CPU. In addition response time (startup time for the first byte) is also usually slow because the I/O device typically uses interrupts to signal its readiness, and the CPU interrupt service routine causes a significant time lag in transferring the first byte. |
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