GS6151 datasheet(26/77 Pages) SEMTECH

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GS6151

Final Data Sheet

Rev.4

PDS-060389

August 2015

26 of 77

Semtech

Proprietary & Confidential

www.semtech.com

4.7 Bypass Mode

In Bypass mode, the GS6151 passes the input data to the outputs, bypassing the

retiming functionality.

There are two bits in the control registers that control the bypass function:

MANUAL_BYPASS and AUTO_BYPASS in the CDR_BYPASS register at address 20h. The

MANUAL_BYPASS bit is inactive (set to 0) by default. The AUTO_BYPASS bit is active (set

to 1) by default, and places the GS6151 CDR into bypass mode when the PLL is not

locked to a data rate. The bypass function does not affect the trace equalization function

of the device.

Note: If MANUAL_BYPASS is active, it overrides the AUTO_BYPASS bit setting.

4.8 DVB-ASI

The GS6151 has the ability to reclock DVB-ASI signals at 270Mb/s. All relevant settings

and control registers that apply to SD-SDI signals at 270Mb/s are also compatible with

DVB-ASI signals at 270Mb/s.

4.9 Device Power Up

4.9.1 Power on Reset (POR)

The GS6151 features an on-chip power-on-reset that places all registers and internal

state machines into their known, default states when the chip is powered up.

4.10 GPIO Pins Configuration

The GS6151 has two GPIO pins that can each be configured as outputs for various

internal status signals, or as inputs to disable either output-driver via pin control. The

bits GPIO[0:1]_IO_SELECT are used to configure the GPIO pins as outputs (0) or inputs

(1). The signals that are output or input on the GPIO pins are selected by the

GPIO[0:1]_SELECT bits, in conjunction with the GPIO[0:1]_IO_SELECT bits of

GPIO_CONTROL_REG_0 at address 2h. The signals that can be output on the GPIO pins

are listed in Table 4-5 below and the signals that can be input are listed in Table 4-6.

Table 4-5: GPIO Status Outputs

GPIO[0:1]_SELECT

Parameter

Description

0000

LOS

Loss of signal indication - High when there is no detected

signal on the selected DDI input

0001

LOCKED

Phase lock indication - High when the CDR has

phase-locked to a valid input signal

0010

LBR_HBR

Low bit-rate/High bit-rate - High when the part is locked to

the SD data rate; low for all other data rates and in bypass.

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