MEC1322 datasheet(286/456 Pages) MICROCHIP

286 / 456 page

MEC1322

DS00001719D-page 286

 2014 - 2015 Microchip Technology Inc.

25.5

Signal Description

25.6

Host Interface

The registers defined for the PWM Interface are accessible by the various hosts as indicated in Section 25.11, "EC-Only

Registers".

25.7

Power, Clocks and Reset

This section defines the Power, Clock, and Reset parameters of the block.

25.7.1

POWER DOMAINS

25.7.2

CLOCK INPUTS

25.7.3

RESETS

25.8

Interrupts

The PWM block does not generate any interrupt events.

25.9

Low Power Modes

The PWM may be put into a low power state by the chip’s Power, Clocks, and Reset (PCR) circuitry. When the PWM is

in the sleep state, the internal counters reset to 0 and the internal state of the PWM and the PWM_OUTPUT signal set

to the OFF state.

25.10 Description

The PWM_OUTPUT signal is used to generate a duty cycle of specified frequency. This block can be programmed so

that the PWM signal toggles the PWM_OUTPUT, holds it high, or holds it low. When the PWM is configured to toggle,

the PWM_OUTPUT alternates from high to low at the rate specified in the PWMx Counter ON Time Register and PWMx

Counter OFF Time Register.

The following diagram illustrates how the clock inputs and registers are routed to the PWM Duty Cycle & Frequency

Control logic to generate the PWM output.

TABLE 25-1:

SIGNAL DESCRIPTION TABLE

Name

Direction

Description

PWM_OUTPUT

OUTPUT

Pulse Width Modulated signal to PWMx pin.

TABLE 25-2:

POWER SOURCES

Name

Description

VCC1

The PWM logic and registers are powered by this single power source.

TABLE 25-3:

CLOCK INPUTS

Name

Description

100kHz_Clk

100kHz_Clk clock input for generating low PWM frequencies, such as 10

Hz to 100 Hz.

48 MHz Ring Oscillator

48 MHz Ring Oscillator clock input for generating high PWM frequencies,

such as 15 kHz to 30 kHz.

TABLE 25-4:

RESET SIGNALS

Name

Description

VCC1_RESET

This reset signal resets all the logic in this block to its initial state

including the registers, which are set to their defined default state.

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