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MEC1322 датащи(PDF) 255 Page - Microchip Technology |
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MEC1322 датащи(HTML) 255 Page - Microchip Technology |
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255 / 456 page ![]() 2014 - 2015 Microchip Technology Inc. DS00001719D-page 255 MEC1322 20.8.3.4 Output GPIO[140:176] 20.8.3.5 Output GPIO[200:236] 20.8.4 GPIO INPUT REGISTERS The GPIO Input Registers can always be used to read the state of a pin, even when the pin is in an output mode and/or when a signal function other than the GPIO signal function is selected; i.e., the Pin Control Register Mux Control bits are not equal to ‘00.’ The MSbit of the Input GPIO registers have been implemented as a read/write scratch pad bit to support processor spe- cific instructions. Offset 28Ch (Note 20-3) Bits Description Type Default Reset Event 31:22 RESERVED RES - - 21:16 GPIO[165:160] Output R/W 00h VCC1_R ESET 15:8 GPIO[157:150] Output R/W 00h VCC1_R ESET 7:0 GPIO[147:140] Output R/W 00h VCC1_R ESET Offset 290h (Note 20-3) Bits Description Type Default Reset Event 31 RESERVED RES - - 30:24 RESERVED RES - - 23:12 RESERVED RES - - 11:10 MCHP Reserved R/W 00h VCC1_R ESET 9:8 GPIO[211:210] Output R/W 00h VCC1_R ESET 7 RESERVED RES - - 6 GPIO206 Output R/W 00h VCC1_R ESET 5 RESERVED RES - - 4:0 GPIO[204:200] Output R/W 00h VCC1_R ESET Note: Bits associated with GPIOs that are not implemented are shown as Reserved. |
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