MEC1322 datasheet(243/456 Pages) MICROCHIP

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 2014 - 2015 Microchip Technology Inc.

DS00001719D-page 243

MEC1322

20.0 GPIO INTERFACE

20.1

General Description

The MEC1322 GPIO Interface provides general purpose input monitoring and output control, as well as managing many

aspects of pin functionality; including, multi-function Pin Multiplexing Control, GPIO Direction control, PU/PD (PU_PD)

resistors, asynchronous wakeup and synchronous Interrupt Detection (int_det), GPIO Direction, and Polarity control, as

well as control of pin drive strength and slew rate.

Features of the GPIO Interface include:

• Inputs:

- Asynchronous rising and falling edge wakeup detection

- Interrupt High or Low Level

• On Output:

- Push Pull or Open Drain output

• Pull up or pull down resistor control

• Interrupt and wake capability available for all GPIOs

• Programmable pin drive strength and slew rate limiting

• Group- or individual control of GPIO data.

• Multiplexing of all multi-function pins are controlled by the GPIO interface

20.2

Power, Clocks and Reset

This section defines the Power, Clock, and Reset parameters of the block.

20.2.1

POWER DOMAINS

20.2.2

CLOCK INPUTS

20.2.3

RESETS

TABLE 20-1:

POWER SOURCES

Name

Description

VCC1

The registers and logic in this block are powered by VCC1.

TABLE 20-2:

CLOCK INPUTS

Name

Description

48 MHz Ring Oscillator

The 48 MHz Ring Oscillator is used for synchronizing the GPIO inputs.

TABLE 20-3:

RESET SIGNALS

Name

Description

VCC1_RESET

This reset is asserted when VCC1 is applied.

nSIO_RESET

This is an alternate reset condition, typically asserted when the main

power rail is asserted. This reset is used for VCC Power Well Emulation.

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