LAN9730 datasheet(104/222 Pages) MICROCHIP

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LAN9730/LAN9730i

DS00001946A-page 104

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4.11.2.4

SUSPEND2

This state is entered from the NORMAL state when the device is suspended and the SUSPEND_MODE field in the

Power Management Control Register (PMT_CTL) is set to 10b. SUSPEND2 is the default suspend mode.

Refer to Section 4.12.2.1, "Enabling GPIO Wake Events" for detailed instructions on how to program events that cause

resumption from the SUSPEND2 state.

This state consumes the least amount of power. In this state, the device may only be awakened by the host or GPIO

assertion.

The state of the Ethernet PHY is lost when entering SUSPEND2. Therefore, host must reinitialize the PHY after the

device returns to the NORMAL state.

4.11.2.5

SUSPEND3

This state is entered from the NORMAL state when the device is suspended and the SUSPEND_MODE field in the

Power Management Control Register (PMT_CTL) is set to 11b.

Refer to Section 4.12.2.1, "Enabling GPIO Wake Events", Section 4.12.2.4, "Enabling External PHY Link Up Wake

Events" and Section 4.12.2.5, "Enabling Good Frame Wake Events" for detailed instructions on how to program events

that cause resumption from the SUSPEND3 state.

In this SUSPEND state, all clocks in the device are enabled and power consumption is similar to the NORMAL state.

However, it allows for power savings in the host CPU, which greatly exceeds that of the device. The driver may place

the device in this state after prolonged periods of not receiving any Ethernet traffic.

This state supports wakeup from GPIO assertion, PHY Link Up, and on reception of a frame passing the filtering con-

straints set by the MAC Control Register (MAC_CR). Due to the limited amount of RX FIFO buffering, it is possible that

there will be frames lost when in this state, as the USB resume time greatly exceeds the buffering capacity of the FIFO.

The Wake On LAN bit of the Wakeup Status (WUPS) field of the Power Management Control Register (PMT_CTL) is

used to signal wakeup due to reception of a frame passing the aforementioned filtering constraints. This bit, along with

the GPIO [10:0] (GPIOx_INT) bits of the Interrupt Status Register (INT_STS), may be examined to determine the

event(s) causing the wakeup. If GPIO7 is found to have caused the wakeup, the PHY Link Up Enable (PHY_LINK-

UP_EN) bit of the General Purpose IO Wake Enable and Polarity Register (GPIO_WAKE) may be examined to deter-

mined whether a PHY Link Up event or pin event occurred.

Note:

Wake On LAN events must not be enabled in the Wakeup Control and Status Register (WUCSR) while

operating in the SUSPEND3 state. If any Wake On LAN event is enabled in WUCSR, all received frames

will be dropped. The setting of the Wake On LAN Enable (WOL_EN) bit of the Power Management Control

Note:

The Wake On LAN bit of the Wakeup Status (WUPS) is used to signal both Wake On LAN events and

wakeup from SUSPEND3 state due to reception of frames passing the filtering constraints set by the MAC

Control Register (MAC_CR). In order to interpret the Wakeup Status (WUPS) without ambiguity, the soft-

ware driver may examine the Suspend Mode (SUSPEND_MODE) field of the Power Management Control

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