SM5906AF datasheet(25/30 Pages) NPC

25 / 30 page

NIPPON PRECISION CIRCUITS-25

SM5906AF

Through-mode operation

If MSON is set LOW (80H command), an operating

mode that does not perform shock-proof functions

becomes active. In this case, input data is passed

as-is (except Force mute operation) to the output.

External DRAM is not accessed. Also, in through

mode, the bit clock and CDDA and VCD mode

(85H command) settings become valid. Note that

SVC mode cannot be used in through mode, revert-

ing to CDDA mode instead.

– In this case, input data needs to be at a rate fs

and the input word clock must be synchronized to

the CLK input (384fs). However, short-range jitter

can be tolerated (jitter-free system).

– Jitter-free system timing starts from the first

YLRCK rising edge after either (A) a reset (NRE-

SET= 0) release by taking the reset input from

LOW to HIGH or (B) by taking MSON from HIGH to

LOW. Accordingly, to provide for the largest possi-

ble jitter margin, it is necessary that the YLRCK

clock be at rate fs by the time jitter-free timing

starts.

The jitter margin is 0.2/ fs (80 clock cycles).

This jitter margin is the allowable difference

between the system clock (CLK) divided by 384 (fs

rate clock) and the YLRCK input clock.

If the timing difference exceeds the jitter margin,

irregular operation like data being output twice or,

conversely, incomplete data output may occur. In

the worst case, a click noise may also be generat-

ed.

When switching from shock-proof mode to through

mode, an output noise may be generated, and it is

therefore recommended to use the YDMUTE set-

ting to mute ZSRDATA until just before data output.

– When NMSOFF = 1 (83H command), the YSCK,

YSRDATA, YLRCK, YC2PO inputs are connected

directly to the ZSCK, ZSRDATA, ZLRCK, ZC2PO

outputs, respectively. When the connection is

switched, the input clock and data pins are

switched instantaneously to the output clock and

data pins, so the outputs should be muted just prior

to switching.

– REFRESH flag (85H) refresh

In shock-proof mode, if operation momentarily

stops (WRSQ and RDSQ stop), data in DRAM

would be lost. In order to be able to use data in

DRAM after such a stop, a refresh mode is provid-

ed that can refresh data, even during a momentary

pause in operation.

1. In shock-proof mode, with WASQ and RASQ in

an operating state, only WASQ stops if a stop

command is issued (if WASQ is already in the

stop state, then the stop command is not

required).

2. Set the REFRESH flag HIGH using the 83H com-

mand. The outputs are then muted, and read

operation also stops. The last read address RAL

is stored.

3. At this point, RDSQ is operating and DRAM is

being accessed without updating and DRAM

data. The operation is similar to momentary stop

operation because the outputs are muted.

DRAM is repeatedly accessed using read

addresses from RAL to VWA.

4. Set the REFRESH flat LOW using the 83H com-

mand to release the momentary stop command.

At this point, the read address is restored to RAL

and data read out starts from this address.

Simultaneously, the output muting is also

released.

5. When WRSQ starts, send the compare com-

mand, and writing starts from after the VWA. If

this operation occurs when MSWREN is HIGH,

the WA, VWA, and RA address relationship may

be lost, resulting in incorrect operation.

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