PUSB3FR4

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© NXP Semiconductors N.V. 2015. All rights reserved.

Product data sheet

Rev. 1 — 26 January 2015

4 of 15

NXP Semiconductors

PUSB3FR4

ESD protection for ultra high-speed interfaces

differential mode

Fig 1.

Insertion loss; typical values

Fig 2.

Relative capacitance as a function of input

voltage; typical values

Sdd21 normalized to 100

;

differential pairs CH1/CH2 versus CH3/CH4

(1) PUSB3FR4 on reference board

(2) Reference board without Device Under Test (DUT)

Fig 3.

Mixed-mode differential NEXT crosstalk;

typical values

Fig 4.

Differential Time Domain Reflectometer (TDR)

plot; typical values

aaa-016314

-3

-1

1

S21dd

(dB)

-5

f (Hz)

06

4

2

aaa-016315

0.4

0.8

1.2

a

0.2

pin 2 and 4

pin 1 and 5

a

C

line

C

line V

I

0 V

=



---------------------------------

=

aaa-016316

-60

-40

-80

-20

0

(dB)

-100

f (Hz)

t (ns)

42.26

42.76

42.66

42.46

42.56

42.36

aaa-016317

115

(Ω)

105

95

85

80

90

100

110

(2)

(1)