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RF2483 датащи(PDF) 10 Page - RF Micro Devices |
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RF2483 датащи(HTML) 10 Page - RF Micro Devices |
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10 / 34 page ![]() 10 of 34 RF2483 DS110505 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com. Pin Function Description Interface Schematic 7LOLB Local oscillator input low band. This input is biased internally at around 1.6V when the chip is in low band mode and 0V when the chip is in high band mode or powered down. The LO signal typically needs to be AC coupled. The noise performance, carrier suppression at low output powers and side- band suppression are all a function of LO power. The optimum LO power is between 0dBm and 3dBm. The device will work with LO powers as low as -20dBm however this is at the expense of higher noise performance at high output powers and poorer sideband suppression. 8GND LO Ground return for the local oscillator input signals. The GND LO pin is effectively the complementary LO input for both the high band and low band LO signals. It has significant amounts of LO signal flow- ing through it. This pin is brought out as an independent ground to enable the PCB board designer to isolate the LO return from the RF outputs ground and the general chip ground. It is recommended that this ground is kept isolated from the die flag ground. Any connections between the GND LO and any other ground should be made through a ground plane. See pins 7 and 9. 9LOHB Local oscillator input high band. This input is biased internally at around 1.6V when the chip is in high band mode and 0V when the chip is in low band mode or powered down. The LO HB signal typically needs to be AC coupled. The noise performance, carrier suppression at low output powers and side- band suppression are all a function of LO power. The optimum LO power is between 0dBm and 3dBm. The device will work with LO powers as low as -20dBm however this is at the expense of higher noise performance at high output powers and poorer sideband suppression. 10 GND1 Ground for LO buffers. See pin 6. 11 BAND SEL Band select input to define active mode. CMOS input. Logic 1 (1.4V to VCC)=High band mode. Logic 2 (0V to 0.5V)=Low band mode. 12 QSIG N Quadrature channel negative baseband input port. See QSIGP. LO L B GN DL O LO H B GND L O V CC 2 V CC2 12 pF 50 |
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