UPD78C18 datasheet(23/110 Pages) NEC

23 / 110 page

µPD78C17,78C18

(b) When specified as input port (MAn = 1)

PA line contents can be loaded into an accumulator by a transfer instruction. They can also be directly

tested bit-wise by an arithmetic or logical operation instruction without the use of an accumulator.

Fig. 2-7 Port A Specified as Input Port

Actual execution of an instruction which manipulates port A is performed in 8-bit units. If a port A read

instruction (MOV A, PA) is executed, the input line contents of the port specified for input and the output

latch contents of the port specified for output are loaded into an accumulator. When a port A write instruc-

tion (MOV PA, A) is executed, data is written to the output latch of both ports specified for input and

output. However, the output latch contents of a bit specified as an input port cannot be loaded to the

accumulator and are not output to an external pin (which functions as input pin), because the output buffer

is off.

•

MODE A register (MA)

8-bit register which specifies port A input/output.

Port A input/output can be specified bit-wise. If the MODE A register corresponding bit is set (1),

this register is input, and if the bit is reset (0), this register is output.

After RESET input or in the hardware STOP mode, all the bits are set, and port A is in the input

mode resulting in the below status.

High-impedance : Without pull-up resistor

High level

: With pull-up resistor

Fig. 2-8 MODE A Register Format

765432

MA 7

MA 6

MA 5

MA 4

MA 3

MA 2

MA 1

MA 0

(n = 0 to 7)

Note Only

µPD78C18

PAn = Output

PAn = Input

V DD

Output

Latch

WRP

RDI

Mask OptionNote

PAn

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