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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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UPD78C18 датащи(PDF) 92 Page - NEC |
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UPD78C18 датащи(HTML) 92 Page - NEC |
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92 / 110 page  92 µPD78C17,78C18 Serial Operation : PARAMETER SYMBOL TEST CONDITIONS MIN. MAX. UNIT SCK cycle time tCYK SCK input Note1 800 ns Note2 400 ns SCK output 1.6 µs SCK low-level width tKKL SCK input Note1 335 ns Note2 160 ns SCK output 700 ns SCK high-level width tKKH SCK input Note1 335 ns Note2 160 ns SCK output 700 ns RXD setup time (to SCK ↑ )tRXK Note1 80 ns RXD hold time (from SCK ↑ )tKRX Note1 80 ns TXD delay time from SCK ↓ tKTX Note1 210 ns Notes 1. If clock rate is ×1 in asynchronous mode, synchronous mode, or I/O interface mode. 2. If clock rate is ×16 or ×64 in asynchronous mode. Remark The numeric values in the table are those when fXX = 15 MHz, CL = 100 pF. Zero-Cross Characteristics : PARAMETER SYMBOL TEST CONDITIONS MIN. MAX. UNIT Zero-cross detection input VZX AC combination 1 1.8 VACP-P 60-Hz sine wave Zero-cross accuracy AZX ±135 mV Zero-cross detection input fZX 0.05 1 kHz frequency Other Operation : PARAMETER SYMBOL TEST CONDITIONS MIN. MAX. UNIT TI high, low-level width tTIH, tTIL 6tCYC CI high, low-level width tCI1H, tCI1L Event count mode 6 tCYC tCI2H,tCI2L Pulse width test mode 48 tCYC NMI high, low-level width tNIH, tNIL 10 µs INT1 high, low-level width tI1H, tI1L 36 tCYC INT2 high, low-level width tI2H, tI2L 36 tCYC AN7 to AN4, low-level width tANH, tANL 36 tCYC RESET high, low-level width tRSH, tRSL 10 µs |
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