18

LTC1404

CLK

CONV

GND

TCLKX

TCLKR

TFSX

TFSR

TDR

LTC1404

TMS320C50-40MHZ

+

10

µF

0.1

µF

UNIPOLAR

INPUT

7.8MHz

EXTERNAL CLOCK

+

10

µF

0.1

µF

5V

1404 TA04a

1

2

3

84

6

7

5

Hardware Interface to the TMS320C50’s TDM Serial Port (Frame Sync is Generated from TFSX)

Logic Analyzer Waveforms Show 2.05

D0

X

X

1404 TA04c

D1

D2

D4

D5

D3

RDY

X

D11 D10 D9

D8

D7

D6

D2

D1

D0

1404 TA04d

D3

D4

D6

D7

D5

0

0

0

RDY D11 D10 D9

D8

NOTE: THE TMS320C50-40MHz HAS A LIMITED SERIAL PORT CLOCK SPEED OF 7.8MHz. TO ALLOW THE LTC1404 TO RUN AT

ITS MAXIMUM SPEED OF 9.6MHz, THE TMS320C50-57 OR TMS320C50-80MHz IS NEEDED

Data from the LTC1404 Loaded into the TMS320C50’s TRCV Register

Data Stored in the TMS320C50’s Memory (in Right Justified Format)

1404T A04B