RM0312 datasheet(240/275 Pages) STMICROELECTRONICS

240 / 275 page

Universal synchronous/asynchronous receiver transmitter (USART)

RM0312

240/275

DocID022352 Rev 3

During the idle state, preamble phase and break transmission, the external USART_CK

clock is not activated. In synchronous mode, the USART transmitter works exactly like in

asynchronous mode. But as USART_CK is synchronized with USART_TX (depending on

CPOL and CPHA), the data on USART_TX is synchronous. In this mode, the USART

receiver works slightly differently compared to the asynchronous mode: if REN=1, the data

is still sampled using the internal oversampling clock and the baud rate clock is output on

the USART_CK pin (rising or falling edge is aligned with the data sampling event depending

on CPOL and CPHA). But contrary to asynchronous mode, the data is evaluated using one

sample and not the majority of 3 samples, meaning that the NF bit will never be set.

Setup and hold times must be respected (depending on the baud rate: 1/16 bit time for an

integer baud rate).

Note:

The USART_CK pin works in conjunction with the USART_TX pin. When the USART

transmitter is disabled (TEN and REN= 0), the USART_CK and USART_TX pins go into

high impedance state.

The LBCL, CPOL and CPHA bits in USART_CR3 have to be selected when both the

transmitter and the receiver are disabled (TEN=REN=0) to ensure that the clock pulses

function correctly. These bits should not be changed while the transmitter or the receiver is

enabled.

It is recommended to set TEN and REN are set in the same instruction in order to minimize

the setup and the hold time of the receiver.

The USART supports master mode only: it cannot receive or send data related to an input

clock (USART_CK is always an output).

The data given in this section apply only when the USART_DIV[3:0] bits in the

USART_BRR2 register are kept at 0. Else the setup and hold times are not 1/16 of a bit time

but 4/16 of a bit time.

This option allows to serially control peripherals which consist of shift registers, without

losing any functions of the asynchronous communication which can still talk to other

asynchronous transmitters and receivers.

Figure 90. USART example of synchronous transmission

Data out

USART_RX

USART_TX

USART_CK

USART

Data in

Synchronous device

(for example slave SPI)

Clock

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