RM0312 datasheet(238/275 Pages) STMICROELECTRONICS

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Universal synchronous/asynchronous receiver transmitter (USART)

RM0312

238/275

DocID022352 Rev 3

21.3.7

Multi-processor communication

It is possible to perform multiprocessor communication with the USART (several USARTs

connected in a network). For example, one of the USARTs can be the master, its Tx output

is connected to the Rx input of the other USART. The others are slaves, their respective Tx

outputs are logically ANDed together and connected to the Rx input of the master.

In multiprocessor configurations it is often desirable that only the intended message

recipient should actively receive the full message contents, thus reducing redundant USART

service overhead for all non addressed receivers.

The non addressed devices may be placed in mute mode by means of the muting function.

In mute mode:

•

None of the reception status bits can be set.

•

All the receive interrupts are inhibited.

•

The RWU bit in USART_CR2 register is set to 1. RWU can be controlled automatically

by hardware or written by the software under certain conditions.

The USART can enter or exit from mute mode using one of two methods, depending on the

WAKE bit in the USART_CR1 register:

•

Idle Line detection if the WAKE bit is reset,

•

Address Mark detection if the WAKE bit is set.

Idle line detection (WAKE=0)

The USART enters mute mode when the RWU bit is written to 1.

It wakes up when an Idle frame is detected. Then the RWU bit is cleared by hardware but

the IDLE bit is not set in the USART_SR register. RWU can also be written to 0 by software.

An example of mute mode behavior using idle line detection is given in Figure 88.

Figure 88. Mute mode using Idle line detection

Address mark detection (WAKE=1)

In this mode, bytes are recognized as addresses if their MSB is a ‘1’ else they are

considered as data. In an address byte, the address of the targeted receiver is put on the 4

LSB. This 4-bit word is compared by the receiver with its own address which is programmed

in the ADD bits in the USART_CR4 register.

The USART enters mute mode when an address character is received which does not

match its programmed address. The RXNE flag is not set for this address byte and no

interrupt request is issued as the USART would have entered mute mode.

RWU written to 1

Data 1

IDLE

Data 2

Data 3

Data 4

Data 6

Data 5

RWU

Mute Mode

Normal Mode

Idle frame detected

RXNE

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