RM0312 datasheet(239/275 Pages) STMICROELECTRONICS

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RM0312

Universal synchronous/asynchronous receiver transmitter (USART)

249

It exits from mute mode when an address character is received which matches the

programmed address. Then the RWU bit is cleared and subsequent bytes are received

normally. The RXNE bit is set for the address character since the RWU bit has been

cleared.

The RWU bit can be written to 0 or 1 when the receiver buffer contains no data (RXNE=0 in

the USART_SR register). Otherwise the write attempt is ignored.

An example of mute mode behavior using address mark detection is given in Figure 89.

Figure 89. Mute mode using address mark detection

Note:

If parity control is enabled, the parity bit remains in the MSB and the address bit is put in the

"MSB - 1" bit.

For example, with 7-bit data, address mode and parity control:

SB I 7-bit data I ADD I PB I STB

where:

SB = Start Bit

STB = STOP Bit

ADD = Address bit

PB = Parity Bit

21.3.8

USART synchronous communication

The USART transmitter allows the user to control bidirectional synchronous serial

communications in master mode.

Note:

This feature is only available for devices with USART_CK pin. Check the device pinout for

availability.

The USART_CK pin is the output of the USART transmitter clock. No clock pulses are sent

to the USART_CK pin during start bit and STOP bit. Depending on the state of the LBCL bit

in the USART_CR3 register clock pulses will or will not be generated during the last valid

data bit (address mark). The CPOL bit in the USART_CR3 register allows the user to select

the clock polarity, and the CPHA bit in the USART_CR3 register allows the user to select the

phase of the external clock (see Figure 90, Figure 91 & Figure 92). During idle and break

frames, the external CK clock is not activated.

In synchronous mode, the USART receiver works differently compared to asynchronous

mode. If REN=1, the data is sampled on USART_CK (rising or falling edge, depending on

CPOL and CPHA), without any oversampling. A setup and a hold time (even if the hold time

is not relevant due to the SPI protocol) must be respected (which depends on the baud rate:

1/16 bit time for an integer baud rate).

RWU written to 1

IDLE

Addr=0

RWU

Mute Mode

Normal Mode

Matching address

RXNE

(RXNE was cleared)

Data 2

Data 3 Data 4

Data 5

Data 1

IDLE

Addr=1

Addr=2

Mute Mode

In this example, the current address of the receiver is 1

(programmed in the USART_CR4 register)

Non-matching address

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