RM0312 datasheet(235/275 Pages) STMICROELECTRONICS

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RM0312

Universal synchronous/asynchronous receiver transmitter (USART)

249

Configurable STOP bits during reception

The number of STOP bits to be received can be configured through the control bits of

Control Register 3 - it can be either 1 or 2.

1 STOP bit: Sampling for 1 STOP bit is done on the 8th, 9th and 10th samples.

2 STOP bits: Sampling for 2 STOP bits is done on the 8th, 9th and 10th samples of the

first STOP bit.If a framing error is detected during the first STOP bit the framing error

flag will be set. The second STOP bit is not checked for framing error. The RXNE flag

will be set at the end of the first STOP bit.

21.3.4

High precision baud rate generator

The receiver and transmitter (Rx and Tx) are both set to the same baud rate programmed by

a 16-bit divider USART_DIV according to the following formula:

The USART_DIV baud rate divider is an unsigned integer, coded in the BRR1 and BRR2

registers as shown in Figure 87.

Refer to Table 46 for typical baud rate programming examples.

Figure 87. How to code USART_DIV in the BRR registers

Note:

The Baud Counters will be updated with the new value of the Baud Registers after a write to

BRR1. Hence the Baud Register value should not be changed during a transaction. The

BRR2 should be programmed before BRR1.

Note:

USART_DIV must be greater than or equal to 16d.

Tx/ Rx baud rate =

fMASTER

USART_DIV

USART_BRR1

USART_BRR2

4 3

Example: To obtain 9600 baud with fMASTER = 16 MHz.

USART_DIV[15:12]

USART_DIV[11:4]

USART_DIV[3:0]

USART_DIV = 1667d = 0683h See the following table.

USART_DIV = 16 000 000/9600

68h

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