 |
поискавой системы для электроныых деталей |
|
|
поискавой системы для электроныых деталей |
|
RM0312 датащи(PDF) 195 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
RM0312 датащи(HTML) 195 Page - STMicroelectronics |
|
|
195 / 275 page  DocID022352 Rev 3 195/275 RM0312 Inter-integrated circuit (I2C) interface 200 19.7.11 Interrupt register (I2C_ITR) Address offset: 0x0A Reset value: 0x00 7 654 3210 Reserved ITBUFEN ITEVTEN ITERREN rw rw rw Bits 7:3 Reserved Bit 2 ITBUFEN: Buffer interrupt enable 0: TXE = 1 or RXNE = 1 does not generate any interrupt. 1:TXE = 1 or RXNE = 1 generates Event interrupt. Bit 1 ITEVTEN: Event interrupt enable 0: Event interrupt disabled 1: Event interrupt enabled This interrupt is generated when: – SB = 1 (Master) – ADDR = 1 (Master/Slave) – ADD10= 1 (Master) – STOPF = 1 (Slave) – BTF = 1 with no TXE or RXNE event – TXE event to 1 if ITBUFEN = 1 – RXNE event to 1if ITBUFEN = 1 – WUFH = 1 (asynchronous interrupt to wakeup from Halt) Bit 0 ITERREN: Error interrupt enable 0: Error interrupt disabled 1: Error interrupt enabled – This interrupt is generated when: –BERR = 1 –ARLO = 1 –AF = 1 –OVR = 1 |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Russian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
