PM0214 datasheet(128/245 Pages) STMICROELECTRONICS

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The STM32 Cortex-M4 instruction set

PM0214

128/245

DocID022708 Rev 4

; halfword of R4

QSUB8

R4, R2, R5 ; Subtracts bytes of R5 from the corresponding byte in R2

; saturates to 8 bits, writes to corresponding byte ofR4.

3.7.4

QASX and QSAX

Saturating Add and Subtract with Exchange and Saturating Subtract and Add with

Exchange, signed.

Syntax

op{cond} {Rd}, Rm, Rn

where:

•

op’ is one of:

QASX Add and Subtract with Exchange and Saturate.

QSAX Subtract and Add with Exchange and Saturate.

•

‘cond’ is an optional condition code (see Conditional execution on page 64)

•

‘Rd’ is the destination register.

•

‘Rn, Rm’ are registers holding the first and second operands.

Operation

The QASX instruction:

Adds the top halfword of the source operand with bottom halfword of second operand.

Subtracts the top halfword of second operand from bottom highword of first operand.

Saturates the result of the subtraction and writes a 16-bit signed integer in the range –

215

≤x ≤215 – 1, where x equals 16, to the bottom halfword of the destination register.

Saturates the results of the sum and writes a 16-bit signed integer in the range

–215

≤x ≤215 – 1, where x equals 16, to the top halfword of the destination register.

The QSAX instruction:

Subtracts the bottom halfword of second operand from top highword of first operand.

Adds the bottom halfword of source operand with top halfword of second operand.

Saturates the results of the sum and writes a 16-bit signed integer in the range

–215

≤x ≤215 – 1, where x equals 16, to the bottom halfword of the destination register.

Saturates the result of the subtraction and writes a 16-bit signed integer in the range –

215

≤x ≤215 – 1, where x equals 16, to the top halfword of the destination register.

Restrictions

Do not use SP and do not use PC.

Condition flags

These instructions do not affect the condition code flags.

Examples

QASX

R7, R4, R2

; Adds top halfword of R4 to bottom halfword of R2,

; saturates to 16 bits, writes to top halfword of R7

; Subtracts top highword of R2 from bottom halfword of

; R4, saturates to 16 bits and writes to bottom halfword

; of R7

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