| поискавой системы для электроныых деталей |
|
PM0214 датащи(PDF) 121 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
PM0214 датащи(HTML) 121 Page - STMicroelectronics |
|
121 / 245 page ![]() DocID022708 Rev 4 121/245 PM0214 The STM32 Cortex-M4 instruction set 244 ; with top halfword of R3, writes to R3 SMUSDX R4, R5, R3 ; Multiplies bottom halfword of R5 with top halfword of ; R3, subtracts multiplication of top halfword of R5 ; with bottom halfword of R3, writes to R4. 3.6.10 SMUL and SMULW Signed multiply (halfwords) and Signed multiply (word by halfword) Syntax op{XY}{cond} Rd, Rn, Rm op{Y}{cond} Rd. Rn, Rm • op is one of: SMUL{XY} Signed multiply (halfwords). X and Y specify which halfword of the source registers Rn and Rm is used as the first and second multiply operand. If X is B, then the bottom halfword, bits [15:0] of Rn is used. If X is T, then the top halfword, bits [31:16] of Rn is used. If Y is B, then the bottom halfword, bits [15:0], of Rm is used. If Y is T, then the top halfword, bits [31:16], of Rm is used. SMULW{Y} Signed multiply (word by halfword). Y specifies which halfword of the source register Rm is used as the second multiply operand. If Y is B, then the bottom halfword (bits [15:0]) of Rm is used. If Y is T, then the top halfword (bits [31:16]) of Rm is used. • ‘cond’ is an optional condition code (see Conditional execution on page 64) • ‘Rd’ is the destination register. • ‘Rn’, ‘Rm’ are registers holding the first and second operands Operation The SMULBB, SMULTB, SMULBT and SMULTT instructions interprets the values from Rn and Rm as four signed 16-bit integers. These instructions: 1. Multiply the specified signed halfword, top or bottom, values from Rn and Rm. 2. Write the 32-bit result of the multiplication in Rd. The SMULWT and SMULWB instructions interprets the values from Rn as a 32-bit signed integer and Rm as two halfword 16-bit signed integers. These instructions: 1. Multiply the first operand and the top, T suffix, or the bottom, B suffix, halfword of the second operand. 2. Write the 32 signed most significant bits of the 48-bit result in the destination register. Restrictions Do not use SP and do not use PC. Examples SMULBT R0, R4, R5 ; Multiplies the bottom halfword of R4 with the top ; halfword of R5, multiplies results and writes to R0 SMULBB R0, R4, R5 ; Multiplies the bottom halfword of R4 with the bottom ; halfword of R5, multiplies results and writes to R0 SMULTT R0, R4, R5 ; Multiplies the top halfword of R4 with the top ; halfword of R5, multiplies results and writes to R0 |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |