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AN4031 датащи(PDF) 22 Page - STMicroelectronics |
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AN4031 датащи(HTML) 22 Page - STMicroelectronics |
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22 / 36 page ![]() System performance considerations AN4031 22/36 DocID022648 Rev 1 Figure 11. DMA dual port For DMA2: • The MEM (memory port) can access AHB1, AHB2, SRAM1, SRAM2, FSMC and Flash memory D-code through the bus matrix. • The Periph (peripheral port) can access: – AHB1, AHB2, SRAM1, SRAM2, FSMC and Flash memory D-code through the bus matrix, – the AHB-to-APB2 bridge through a direct path (not crossing the bus matrix). For DMA1: • The MEM (memory port) can access SRAM1, SRAM2, FSMC, Flash memory D-code through the bus matrix. • The Periph (peripheral port) can only access the AHB-to-APB1 bridge through a direct path (not crossing the bus matrix). |
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