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UPD64AMC датащи(PDF) 45 Page - NEC |
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UPD64AMC датащи(HTML) 45 Page - NEC |
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45 / 64 page ![]() 45 µPD64A, 65 Data Sheet U14380EJ2V0DS00 MOV T, @R0 <1> Instruction code : 0 01111111 1 <2> Cycle count : 1 <3> Function : (T) ← ((P13), (R0)) Transfers the program memory contents to the timer register T (t9 to t0) specified with the control register P13 and the register pair R10-R00. The program memory, which consists of 10 bits, is placed in the following state after the transfer to the register. t9 t8 t7 t6 t5 t4 t3 t2 t1 t0 T1 T0 t1 t0 t9 t8 t7 t6 t5 t4 t3 t2 @R0 → Program memory Timer T The high-order 2 bits of the program memory address are specified with the control register (P13). Caution When setting a timer value in the program memory, ensure to use the DT directive. 9.10 Others HALT #data4 <1> Instruction code : 0 00101000 1 : 0 00000 d3 d2 d1 d0 <2> Cycle count : 1 <3> Function : Sandby mode Places the CPU in standby mode. The condition for having the standby mode (HALT/STOP mode) canceled is specified with the immediate data. STTS R0n <1> Instruction code : 0 00110 R3 R2 R1R0 <2> Cycle count : 1 <3> Function : if statuses match F ← 1 else F ← 0 n = 0 to F Compares the S0, S1, KI/O, KI, and TIMER statuses with the register R0n contents. If at least one of the statuses coincides with the bits that have been set, the status flag F is set (to 1). If none of them coincide, the status flag F is cleared (to 0). |
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