AN4504 datasheet(19/41 Pages) STMICROELECTRONICS

19 / 41 page

DocID026419 Rev 1

19/41

AN4504

Interrupt generation

5.2

Interrupt configuration

The L3G4200D offers several possibilities to personalize the interrupt signal. The registers

involved in the interrupt generation behavior are INT1_CFG, INT1_THS and

INT1_DURATION.

Whenever an interrupt condition is verified, the interrupt signal is generated and by reading

the INT1_SRC register it is possible to understand which condition happened.

Reading INT1_SRC also clears the INT1_SRC IA bit (and eventually the interrupt signal on

the INT1 pin) and allows the refresh of data in the INT1_SRC register if the latched option

was chosen.

Table 17. INT1_CFG register

AND/OR

LIR

ZHIE

ZLIE

YHIE

YLIE

XHIE

XLIE

Table 18. INT1_CFG description

AND/OR

AND/OR combination of interrupt events. Default value: 0

(0: OR combination of interrupt events 1: AND combination of interrupt events

LIR

Latch interrupt request. Default value: 0

(0: interrupt request not latched; 1: interrupt request latched)

Cleared by reading INT1_SRC reg.

ZHIE

Enable interrupt generation on Z high event. Default value: 0

(0: disable interrupt request; 1: enable interrupt request on measured rate value

higher than preset threshold)

ZLIE

Enable interrupt generation on Z low event. Default value: 0

(0: disable interrupt request; 1: enable interrupt request on measured rate value lower

than preset threshold)

YHIE

Enable interrupt generation on Y high event. Default value: 0

(0: disable interrupt request; 1: enable interrupt request on measured rate value

higher than preset threshold)

YLIE

Enable interrupt generation on Y low event. Default value: 0

(0: disable interrupt request; 1: enable interrupt request on measured rate value lower

than preset threshold)

XHIE

Enable interrupt generation on X high event. Default value: 0

(0: disable interrupt request; 1: enable interrupt request on measured rate value

higher than preset threshold)

XLIE

Enable interrupt generation on X low event. Default value: 0

(0: disable interrupt request; 1: enable interrupt request on measured rate value lower

than preset threshold)

Table 19. Interrupt mode configuration

AND/OR bit

Interrupt mode

OR combination of interrupt events

AND combination of interrupt events

AN4504 датащи(PDF) 19 Page - STMicroelectronics

AN4504 датащи(HTML) 19 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41

датащи скачать

ссылки URL