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Induced turn-on phenomenon

AN2785

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Doc ID 14785 Rev 1

Induced turn-on phenomenon

One possible phenomenon to be analyzed is the induced turn ON that could happen on a

turned OFF power IGBT (or MOSFET) when its companion on the same half-bridge is

switching on. This phenomenon is due to the current injected on the gate by the Miller

parasitic capacitance (Cgc), which causes an undesired voltage increase on the gate of the

power IGBT (or MOSFET) which should be kept well turned OFF. Induced gate voltage

depends on the absolute value of the parasitic capacitance Cgc, its relative ratio with Cge,

the value of the dVOUT/dt of the half-bridge and the value of the equivalent (turn OFF)

resistance between the emitter (or the source) and the gate. Figure 24 shows this

phenomenon.

Figure 24.

Induced turn ON phenomenon - circuital description

Note that typically the induced turn ON phenomenon does not cause a complete turn ON of

the power MOSFET, so it is hard to have a destructive cross-conduction on the half bridge

during commutations. Nevertheless, a weak conduction of the opened power switch might

increase the power dissipation of the power stage, increasing then the overall temperature

of the power MOSFETs and reducing the efficiency. This is the reason why this

phenomenon deserves particular attention also in terms of thermal performances of the

power application.

This phenomenon could be reduced in the following ways.

By reducing the resistance path between the gate and emitter (source). Reducing

as much as possible the gate resistance in which the injected current flows results

in a lower voltage drop on the gate. The drawback could be an increase of the

dVOUT/dt during the turn OFF of the power IGBT (or MOSFET) which commutates

in hard-switching and then an increase of the electrical noise and EMI issues (as

explained in the previous paragraph the power IGBT or MOSFET in hard-switching

is always the one which has the channel in the same direction as the current). On

the other hand, the dVout/dt during turn OFF is usually lower than the one during

turn ON because the plateau voltage is closer to the source voltage than the

supply voltage of the driver, resulting in a lower gate current for the discharge of

the gate charge.

PGND

LVG

OUT

HVG

dVout/dt

induced

voltage

injected

current

PGND

LVG

OUT

HVG

dVout/dt

induced

voltage

injected

current

low side hard switching

high side hard switching

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