AN2785 datasheet(25/51 Pages) STMICROELECTRONICS

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AN2785

Application examples

Doc ID 14785 Rev 1

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On the other hand, if the switch turns ON when its Vce is already close to zero or Vce keeps

staying close to zero after turn OFF, the transition is soft and, during the commutation, the

switch dissipates almost no energy. This last condition occurs when the free-wheeling diode

of the switch is bringing the current because the diode is in the same direction as the load

current.

As a general rule, one should consider that the dynamics of the transition (dVOUT/dt, Vce

rise/fall time etc.) is always managed and controlled by the power switch in hard switching,

while its companion switch is necessarily in soft switching (because it is in the opposite

direction with respect to the load current). Considering this and in order to understand the

mechanism of the power IGBT (MOSFET) transition, the hard switching transition is further

described below. Note that all of the following descriptions always consider an inductive load

connected to the half-bridge stage output.

Figure 18

depicts the dynamics of the hard switching for the turn ON transition.

The first graph is related to the gate charge curves of the power IGBT (or MOSFET). This is

a typical graph available in the datasheet of every IGBT or MOSFET, and describes the

dependence of the amount of charge required by the IGBT gate on the voltage drop

between the gate and the emitter (or source). The second graph shows the collector current

(Ic) and Vce voltage versus time. The third graph shows the working point of the IGBT

traced on the various Ic vs. Vce characteristic curves for different Vge voltages. For a single

turn ON transition, four main phases related to the power IGBT (MOSFET) commutation can

be distinguished. On the left side of Figure 18, the IGBT conditions for each phase are

described. During phase T1, the gate begins to be charged, but the power IGBT is still not

conducting because Vge is below the IGBT threshold. In this state the IGBT current is zero

and its Vce is at the maximum, while Vge is gradually increasing. In phase T2, the Vge

voltage goes above the IGBT threshold and the IGBT starts to bring part of the load current,

while Vce remains fixed at the maximum level because the free-wheeling diode of the

companion IGBT is still bringing the rest of the load current, and therefore is still in

conduction, clamping in this way the Vce voltage. Both in T1 and T2 phases, the gate

current contributes to charge the equivalent Cge parasitic capacitance of the IGBT. In the Ic

vs. Vce characteristic plot, the T2 phase is the vertical section of the working curve trace,

because the IGBT is moving on its own characteristic with a constant Vce and an increasing

current, while its Vge is increasing too. When the amount of current flowing in the IGBT is

equal to the load current, the diode turns OFF and the Vce voltage starts to decrease

because it is no longer clamped by the free-wheeling diode of the other IGBT. The working

point on the Ic vs Vce curve reaches the lload value and starts to move horizontally on the Ic

constant curve in the direction of the decreasing Vce voltages. This is the T3 phase, usually

called plateau phase. This name comes from the fact that the gate charge curve is

horizontal for the whole T3 phase, until Vce reaches the Vce_sat value corresponding to the

Iload current. Note that the Vge voltage is constant although the gate current flowing in the

IGBT gate is not zero: the reason is that the whole gate current is used to charge the Cgc

(Miller) parasitic capacitance which then experiences a dV/dt on its terminals because the

Vce voltage is decreasing after the diode turn OFF. In a first approximation, if the Cgc was

constant (it is actually not), the dVOUT/dt could be calculated as follows:

SOURCE

FALL

OUT

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