AN2644 datasheet(40/64 Pages) STMICROELECTRONICS

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The LLC resonant half-bridge converter

AN2644

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Since at startup the output capacitors are discharged, the startup phase can be regarded as

a "temporary short circuit" (where, however, the output voltage is allowed to increase) and

actually it has to be handled like a short circuit as mentioned in the previous section. To

minimize energy flow, the initial switching frequency will have to be much higher than the

resonance frequency fR1, so that the converter operates in the inductive region, ZVS is

maintained and the input current is kept under control by the inductive reactance of the tank

circuit. The frequency will be allowed to progressively decay until the output voltage comes

close to the regulated value and the control loop closes and takes over.

Some typical waveforms at startup for the converter of Figure 15 are shown in Figure 26,

where the initial frequency is set at 300 kHz (against fR1≈ 76 kHz).

In the LLC resonant converter there is an additional phenomenon that shows up just at the

very beginning and causes higher resonant tank current to flow and ZVS loss.

As mentioned in the Section 2, the resonant capacitor Cr plays the double role of resonant

capacitor and DC blocking capacitor. This essentially means that the resonant voltage on Cr

is superimposed on a DC value that equals Vin/2 because the half-bridge is driven with 50%

duty cycle. As a result, the primary of the transformer is symmetrically driven by a

±Vin/2

square wave. This is true when steady-state operation has been reached.

At startup the initial voltage across Cr is zero and for the first few cycles the voltage seen by

the transformer when the high-side power MOSFET Q1 is on is considerably different from

the voltage seen when Q2 is on. The transformer driving voltage will tend to become

symmetrical as switching cycles follow one another and Cr is charged at the steady state

DC level. During the Cr charge transient the v·s unbalance can be quite high and this makes

the tank current irregular in the first few cycles, with peak values that can be considerably

higher than the steady-state peak-to-peak current expected at the starting frequency.

Additionally, the fundamental ZVS conditions ("when one switch turns off, the tank current

must have the same sign as the impressed voltage") may be violated so that even capacitive

mode operation can be observed.

Figure 26.

Converter's startup: main waveforms

I(D2) = D2 current

V(D2) = D2 anode voltage

I(Q2) = Q2 current

I(Lp) = Lp (magnetizing) current

Vc = Resonant capacitor voltage

LVG = Q2 gate

I(D1) = D1 current

V(D1) = D1 anode voltage

I(Q1) = Q1 current

IR = Tank circuit’s current

VHB = Node HB voltage

HVG= Q1 gate

I(D2) = D2 current

V(D2) = D2 anode voltage

I(Q2) = Q2 current

I(Lp) = Lp (magnetizing) current

Vc = Resonant capacitor voltage

LVG = Q2 gate

I(D1) = D1 current

V(D1) = D1 anode voltage

I(Q1) = Q1 current

IR = Tank circuit’s current

VHB = Node HB voltage

HVG= Q1 gate

I(D2) = D2 current

V(D2) = D2 anode voltage

I(Q2) = Q2 current

I(Lp) = Lp (magnetizing) current

Vc = Resonant capacitor voltage

LVG = Q2 gate

I(D1) = D1 current

V(D1) = D1 anode voltage

I(Q1) = Q1 current

IR = Tank circuit’s current

VHB = Node HB voltage

HVG= Q1 gate

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