| поискавой системы для электроныых деталей |
|
ADAV802 датащи(PDF) 29 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
ADAV802 датащи(HTML) 29 Page - Analog Devices |
|
29 / 53 page ![]() Preliminary Technical Data ADAV802 Rev. Pr G | Page 29 of 53 Table 28. Playback Port Control Register RES RES RES CLKSRC1 CLKSRC0 SPMODE2 SPMODE1 SPMODE0 7 6 5 4 3 2 1 0 ADDRESS = 0000100 CLKSRC1-0 Selects the Clock Source for generating the ILRCLK and IBCLK 00 = Input Port is a Slave 01 = Recovered PLL Clock 10 = Internal Clock 1 11 = Internal Clock 2 SPMODE1-0 Selects the serial format of the Playback Port 000 = Left Justified 001 = I2S 100 = 24 Bit Right Justified 101 = 20 Bit Right Justified 110 = 18 Bit Right Justified 111 = 16 Bit Right Justified Table 29. Auxiliary Input Port Register RES RES RES CLKSRC1 CLKSRC0 SPMODE2 SPMODE1 SPMODE0 7 6 5 4 3 2 1 0 ADDRESS = 0000101 CLKSRC1-0 Selects the Clock Source for generating the IAUXLRCLK and IAXUBCLK 00 = Input Port is a Slave 01 = Recovered PLL Clock 10 = Internal Clock 1 11 = Internal Clock 2 SPMODE1-0 Selects the serial format of Auxiliary Input Port 000 = Left Justified 001 = I2S 100 = 24 Bit Right Justified 101 = 20 Bit Right Justified 110 = 18 Bit Right Justified 111 = 16 Bit Right Justified |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |