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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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HM5259165B датащи(PDF) 14 Page - Elpida Memory |
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HM5259165B датащи(HTML) 14 Page - Elpida Memory |
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14 / 63 page  HM5259165B/HM5259805B/HM5259405B-75/A6 Data Sheet E0118H10 14 Self-refresh entry [SELF]: When this command is input during the IDLE state, the SDRAM starts self- refresh operation. After the execution of this command, self-refresh continues while CKE is Low. Since self- refresh is performed internally and automatically, external refresh operations are unnecessary. Power down mode entry: When this command is executed during the IDLE state, the SDRAM enters power down mode. In power down mode, power consumption is suppressed by cutting off the initial input circuit. Self-refresh exit: When this command is executed during self-refresh mode, the SDRAM can exit from self- refresh mode. After exiting from self-refresh mode, the SDRAM enters the IDLE state. Power down exit: When this command is executed at the power down mode, the SDRAM can exit from power down mode. After exiting from power down mode, the SDRAM enters the IDLE state. Function Truth Table The following table shows the operations that are performed when each command is issued in each mode of the SDRAM. The following table assumes that CKE is high. Current state CS RAS CAS WE Address Command Operation Precharge H × ××× DESL Enter IDLE after t RP LH H H × NOP Enter IDLE after t RP L H L H BA, CA, A10 READ/READ A ILLEGAL* 4 L H L L BA, CA, A10 WRIT/WRIT A ILLEGAL* 4 L L H H BA, RA ACTV ILLEGAL* 4 L L H L BA, A10 PRE, PALL NOP* 6 LL LH × REF, SELF ILLEGAL L L L L MODE MRS ILLEGAL Idle H × ××× DESL NOP LH H H × NOP NOP L H L H BA, CA, A10 READ/READ A ILLEGAL* 5 L H L L BA, CA, A10 WRIT/WRIT A ILLEGAL* 5 L L H H BA, RA ACTV Bank and row active L L H L BA, A10 PRE, PALL NOP LL LH × REF, SELF Refresh L L L L MODE MRS Mode register set |
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