DS2152 datasheet(45/94 Pages) DALLAS

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DS2152

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RDS0M: RECEIVE DS0 MONITOR REGISTER (Address=1F Hex)

(MSB)

(LSB)

SYMBOL

POSITION

NAME AND DESCRIPTION

RDS0M.7

Receive DS0 Channel Bit 1. MSB of the DS0 channel (first bit

to be received).

RDS0M.6

Receive DS0 Channel Bit 2.

RDS0M.5

Receive DS0 Channel Bit 3.

RDS0M.4

Receive DS0 Channel Bit 4.

RDS0M.3

Receive DS0 Channel Bit 5.

RDS0M.2

Receive DS0 Channel Bit 6.

RDS0M.1

Receive DS0 Channel Bit 7.

RDS0M.0

Receive DS0 Channel Bit 8. LSB of the DS0 channel (last bit to

be received).

7.0 SIGNALING OPERATION

The DS2152 contains provisions for both processor based (i.e., software based) signaling bit access and

for hardware based access. Both the processor based access and the hardware based access can be used

simultaneously if necessary. The processor based signaling is covered in Section 7.1 and the hardware

based signaling is covered in Section 7.2.

7.1 PROCESSOR BASED SIGNALING

The robbed-bit signaling bits embedded in the T1 stream can be extracted from the receive stream and

inserted into the transmit stream by the DS2152. There is a set of 12 registers for the receive side (RS1 to

RS12) and 12 registers on the transmit side (TS1 to TS12). The signaling registers are detailed below.

The CCR1.5 bit is used to control the robbed signaling bits as they appear at RSER. If CCR1.5 is set to 0,

then the robbed signaling bits will appear at the RSER pin in their proper position as they are received. If

CCR1.5 is set to a 1, then the robbed signaling bit positions will be forced to a 1 at RSER. If hardware

based signaling is being used, then CCR1.5 must be set to 0.

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