DS2152 datasheet(70/94 Pages) DALLAS

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DS2152

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Each of the bit positions in the Transmit Transparency Registers (TTR1/TTR2/TTR3) represent a DS0

channel in the outgoing frame. When these bits are set to a 1, the corresponding channel is transparent (or

clear). If a DS0 is programmed to be clear, no robbed-bit signaling will be inserted nor will the channel

have Bit 7 stuffing performed. However, in the D4 framing mode, bit 2 will be overwritten by a 0 when a

Yellow Alarm is transmitted. Also, the user has the option to prevent the TTR registers from determining

which channels are to have Bit 7 stuffing performed. If the TCR2.0 and TCR1.3 bits are set to 1, then all

24 T1 channels will have Bit 7 stuffing performed on them regardless of how the TTR registers are

programmed. In this manner, the TTR registers are only affecting which channels are to have robbed-bit

signaling inserted into them. Please see Figure 15-11 for more details.

14.0 LINE INTERFACE FUNCTION

The line interface function in the DS2152 contains three sections; (1) the receiver which handles clock

and data recovery, (2) the transmitter which waveshapes and drives the T1 line, and (3) the jitter

attenuator. Each of these three sections is controlled by the Line Interface Control Register (LICR), which

is described below.

LICR: LINE INTERFACE CONTROL REGISTER (Address=7C Hex)

(MSB)

(LSB)

EGL

JAS

JABDS

DJA

TPD

LICR

SYMBOL

POSITION

NAME AND DESCRIPTION

LICR.7

Line Build Out Select Bit 2. Sets the transmitter build out; see

the Table 14-2

LICR.6

Line Build Out Select Bit 1. Sets the transmitter build out; see

the Table 14-2

LICR.5

Line Build Out Select Bit 0. Sets the transmitter build out; see

the Table 14-2

EGL

LICR.4

Receive Equalizer Gain Limit.

0 = -36 dB

1 = -30 dB

JAS

LICR.3

Jitter Attenuator Select.

0 = place the jitter attenuator on the receive side

1 = place the jitter attenuator on the transmit side

JABDS

LICR.2

Jitter Attenuator Buffer Depth Select

0 = 128 bits

1 = 32 bits (use for delay sensitive applications)

DJA

LICR.1

Disable Jitter Attenuator.

0 = jitter attenuator enabled

1 = jitter attenuator disabled

TPD

LICR.0

Transmit Power Down.

0 = normal transmitter operation

1 = powers down the transmitter and 3-states the TTIP and

TRING pins

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