CS5126 datasheet(14/32 Pages) CIRRUS

14 / 32 page

The CS5126 can operate with a wide range of

reference voltages, but signal-to-noise perform-

ance is maximized by using as wide a signal

range as possible. The recommended reference

voltage is 4.5 volts. The CS5126 can actually

accept reference voltages up to the positive ana-

log supply. However, as the reference voltage

approaches VA+ the external drive requirements

may increase at VREF.

An internal reference buffer is used to protect

the external reference from current transients

during conversion. This internal buffer enlists

the aid of an external 0.1

µF ceramic capacitor

which m u st be ti ed between i t s out p u t ,

REFBUF, and the negative analog supply, VA-.

Analog Input Connection

Each time the CS5126 finishes a conversion cy-

cle it switches the internal capacitor array to the

appropriate analog input pin, AINL or AINR.

This creates a minor dynamic load at the sam-

pling frequency. All throughput specifications

apply for maximum analog source impedances

of 200

Ω at AINL and AINR. In addition, the

comparator requires source impedances of less

than 400

Ω around 2MHz for stability, which is

met by practically all bipolar op amps. For more

information, see our Application Note: "Input

Buffers for the CS501X/CSZ511X Series of A/D

Converters"

Analog Input Range/Coding Format

The CS5126 features a bipolar input range with

the reference voltage applied to VREF defining

both positive and negative full-scale. The coding

format is set by the state of the CODE input. If

high, coding is 2’s complement; if low, the

CS5126’s output is in offset-binary format.

Grounding and Power Supply Decoupling

The CS 5126 use s t h e an al o g g r o u n d

connection, AGND, only as a reference voltage.

No dc power or signal currents flow through the

AGND connection, thus minimizing the potential

for interchannel crosstalk. Also, AGND is com-

pletely independent of DGND. However, any

noise riding on the AGND input relative to the

system’s analog ground will induce conversion

errors. Therefore, both analog inputs and the ref-

erence voltage should be referred to the AGND

pin, which should be used as the entire system’s

analog ground. The digital and analog supplies

are isolated within the CS5126 and are pinned

out separately to minimize coupling between the

analog and digital sections of the chip. All four

supplies should be decoupled to their respective

grounds using 0.1

µF ceramic capacitors. If sig-

nificant low frequency noise is present on the

supplies, 1

µF tantalum capacitors are recom-

mended in parallel with the 0.1

µF capacitors.

The positive digital power supply of the CS5126

must never exceed the positive analog supply by

more than a diode drop or the CS5126 could

experience permanent damage. If the two sup-

plies are derived from separate sources, care

must be taken that the analog supply comes up

first at power-up. The system connection dia-

grams in figures 2 and 9 show a decoupling

scheme which allows the CS5126 to be powered

from a single set of

± 5V rails. The positive

digital supply is derived from the analog supply

through a 10

Ω resistor to avoid the analog sup-

ply dropping below the digital supply. If this

scheme is utilized, care must be taken to insure

that any digital load currents (which flow

through the 10

Ω resistors) do not cause the

magnitude of digital supplies to drop below the

analog supplies by more than 0.5 volts. Digital

CS5126

DS32F1

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