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CS4630 датащи(PDF) 16 Page - Cirrus Logic |
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CS4630 датащи(HTML) 16 Page - Cirrus Logic |
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16 / 38 page ![]() CS4630 16 DS445PP1 knowledge, Special Cycles, and Dual Address Cy- cle transactions are not generated. The PCI bus transactions supported by the CS4630 device are summarized in Table 1. Note that no Target Abort conditions are signalled by the de- vice. Byte, Word, and Doubleword transfers are supported for Configuration Space accesses. Only Doubleword transfers are supported for Register or Memory area accesses. Bursting is not supported for host-initiated transfers to/from the CS4630 in- ternal register space, RAM memory space, or PCI configuration space (disconnect after first phase of transaction is completed). Initiator Target Type PCI Dir Host Registers (BA0) Mem Write In Host Registers (BA0) Mem Read Out Host Memories (BA1) Mem Write In Host Memories (BA1) Mem Read Out Host Config Space 1 Config Write In Host Config Space 1 Config Read Out Host Legacy H/W I/O Write In Host Legacy H/W I/O Read Out CS46XX Host System Mem Write Out CS46XX Host System Mem Read In CS46XX South Bridge I/O Write Out CS46XX South Bridge I/O Read In Table 1. PCI Interface Transaction Summary |
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