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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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LPC2131 датащи(PDF) 29 Page - NXP Semiconductors |
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LPC2131 датащи(HTML) 29 Page - NXP Semiconductors |
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29 / 45 page  LPC2131_32_34_36_38 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 5.1 — 29 July 2011 29 of 45 NXP Semiconductors LPC2131/32/34/36/38 Single-chip 16/32-bit microcontrollers [4] VDD supply voltages must be present. [5] 3-state outputs go into 3-state mode when VDD is grounded. [6] Please also see the errata note mentioned in the errata sheet. [7] Accounts for 100 mV voltage drop in all supply lines. [8] Only allowed for a short time period. [9] Minimum condition for VI = 4.5 V, maximum condition for VI =5.5 V. [10] Applies to P1.16 to P1.25. [11] On pin VBAT. [12] Optimized for low battery consumption. [13] To VSS. 9. Dynamic characteristics [1] Parameters are valid over operating temperature range unless otherwise specified. [2] Typical ratings are not guaranteed. The values listed are at room temperature (25 C), nominal supply voltages. [3] Bus capacitance Cb in pF, from 10 pF to 400 pF. Table 7. Dynamic characteristics Tamb = 40 C to +85 C for commercial applications, VDD over specified ranges.[1] Symbol Parameter Conditions Min Typ[2] Max Unit External clock fosc oscillator frequency 10 - 25 MHz Tcy(clk) clock cycle time 40 - 100 ns tCHCX clock HIGH time Tcy(clk) 0.4 - - ns tCLCX clock LOW time Tcy(clk) 0.4 - - ns tCLCH clock rise time - - 5 ns tCHCL clock fall time - - 5 ns Port pins (except P0.2 and P0.3) tr(o) output rise time - 10 - ns tf(o) output fall time - 10 - ns I2C-bus pins (P0.2 and P0.3) tf(o) output fall time VIH to VIL 20 + 0.1 C b [3] -- ns |
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